Samsung Electronics Co., Ltd.

Ui-Sik Kim

Young-Hoon Park

Won-je Park

Dae-cheol Seong

Yeo-Ju Yoon

Bo-Bae Kang

Jeong-Ho Lee

Sang-il Jung

Jun-Seok Yang

Bo-Bae Keang

In a method of manufacturing a CMOS image sensor, a P type epitaxial layer is formed on an N type substrate. A deep Ptype well layer is formed in the P type epitaxial layer. An N type deep guardring well is formed in a photodiode guardring region. The N type deep guardring region makes contact with the N type substrate and also be connected with an operational voltage terminal. A triple well is formed in a photodiode region and a peripheral circuit region. The triple well is used for forming a PMOS and an NMOS having different operational voltages. An isolation region is formed in the photodiode region. The isolation region in the photodiode region has a depth different from a depth of an isolation region in the peripheral circuit region.

CMOS image sensor having a crosstalk prevention structure and method of manufacturing the same

Complementary metal-oxide semiconductor (CMOS) image sensors (CIS) and methods of manufacturing the same are provided, the sensors include an epitaxial layer on a substrate in which a first, second, third and fourth region are defined. A photodiode may be formed at an upper portion of the epitaxial layer in the first region. A plurality of gate structures may be formed on the epitaxial layer in the second, third and fourth regions. A first blocking layer may be formed on the gate structures and the epitaxial layer in the first and second regions. A first impurity layer may be formed at an upper portion of the epitaxial layer adjacent to the gate structures in the second region, and a second impurity layer at upper portions of the epitaxial layer adjacent to the gate structures in the third and fourth regions. A color filter layer may be formed over the photodiode. A microlens may be formed on the color filter layer.

CMOS image sensors

CMOS image sensor having a crosstalk prevention structure

An image sensor includes a logic region and an APS region having a first gate electrode, a photo-detector, a first protecting layer, first spacers, and a second protecting layer. The first gate electrode is formed over a semiconductor substrate. The photo-detector is formed to a side of the first gate electrode within the semiconductor substrate. The first protecting layer is formed over the first gate electrode and the photo-detector. The first spacers are formed over the first protecting layer to the sides of the first gate electrode. The second protecting layer is formed over the first protecting layer and the spacers. The first and second protecting layers are for preventing a contaminant from reaching the photo-detector.

CMOS image sensor with photo-detector protecting layers

CMOS image sensors and methods of fabricating the same. The CMOS image sensors include a pixel array region having an active pixel portion and an optical block pixel portion which encloses the active pixel portion. The optical block pixel portion includes an optical block metal pattern for blocking light. The optical block metal pattern may be connected to a ground portion.

CMOS image sensors and methods of fabricating the same

Methods of manufacturing CMOS image sensors

Example embodiments may provide fine patterns for semiconductor devices and methods of forming fine patterns for semiconductor devices. Example methods may include forming a spacer pattern on a substrate and/or an insulating layer pattern adjacent to sides of the spacer pattern and/or disposed at the same level as the spacer pattern, forming a pair of recesses exposing sides of the spacer pattern by removing a portion of the insulating layer pattern, and/or filling a conductive material in the recesses.

Growing community of inventors

Seongnam-si, South Korea

Ui-Sik Kim