International Business Machines Corporation

Udi Nir

Noam Jungmann

Elazar Kachir

Haining S Yang

Robert C Wong

Donald W Plass

James W Dawson

Amira Rozenfeld

Omer Heymann

Limor Plotkin

Dana Bar-Niv

A digital voltage boost circuit, optionally working in parallel with an analog voltage regulator, periodically injects a constant amount of current each cycle into the bit line of a high density memory array to eliminate the bias voltage reduction which would otherwise occur. This results in a much faster recovery time and reduces the semiconductor real estate required. A pulse generator in the boost circuit generates one or more current modulation signals which control corresponding current supply devices in a current source. The boost circuit drives a constant amount of current to the bias voltage node each memory cycle.

Digital voltage boost circuit

A method of increasing a drain to source voltage measured at an access pass-gate to a SRAM circuit in a SRAM memory array, including increasing a low voltage from a low voltage source powering said SRAM circuit, and increasing a high voltage from a high voltage source powering the SRAM circuit.

Boost cell supply write assist

Growing community of inventors

Tel Aviv, Israel

Udi Nir