Paxonet Communications, Inc.

Conexant Systems, Inc.

Raza Microelectronics, Inc.

Coreel Microsystems

Uday Govind Joshi

Bidyut Parruck

Makarand Dharmapurikar

Chetan V Sanghvi

Vinay Kumar Bhasin

A computer-implemented method for scheduling cells output on an output path of a data switch. The data switch is configured for switching the cells from a plurality of input paths to the output path. The method includes providing a plurality of queues, each queue of the plurality of queues having an assigned weight, respective ones of the plurality of input paths being coupled to respective ones of the plurality of queues. The method further includes providing a plurality of queues of queues. The plurality of queues being coupled to the plurality of queues of queues with queues of the plurality of queues having a similar weight being coupled a same queue of queues of the plurality of queues of queues. There is further included providing a scheduler, the plurality of queues of queues being input into the scheduler, the scheduler being coupled to the output path.

Scheduling techniques for data cells in a data switch

An improved method and apparatus for automatically forming a virtual circuit in an ATM switch is disclosed. In one aspect of the invention, the virtual circuit may be used to transport an ATM data cell included in an associated communication session. The disclosed method includes the following operative steps. First, a configuration cell is created. Next the virtual circuit is formed by passing the configuration cell to a destination node by way of at least one connective node. The configuration cell updates and validates an associated connection table capable of defining a virtual link. The virtual link being part of the virtual circuit.

Method and apparatus for forming a virtual circuit

Improved methods and apparatus to facilitate switching Asynchronous Transfer Mode (ATM) cells through an ATM switching circuit are disclosed. The improved methods and apparatus facilitate the implementation of per virtual connection buffering, per virtual connection arbitration of ATM cells, and/or per virtual connection back-pressuring to improve switching efficiency and/or reduce the complexity and/or costs of the ATM switching circuit.

Asynchronous transfer mode switching architectures having connection

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Bombay, India

Uday Govind Joshi