Visera Technologies Company Limited

Taiwan Semiconductor Manufacturing Comp. Ltd.

Omnivision Technologies, Inc.

Industrial Technology Research Institute

Tzy-Ying Lin

Tzu-Han Lin

Chieh-Yuan Cheng

Hsiao-Wen Lee

Chia-Yang Chang

Jui-Ping Weng

Chien-Pang Lin

Kai-Chih Wang

Fang-Chang Liu

Same-Ting Chen

Wen-Rong Huang

Peter Zung

Wu-Cheng Kuo

Dong-Sing Wuu

Hong-Ming Chen

Chun-Chiang Yen

Kuo-Jung Fu

Hung-Yeh Lin

Tzung-Rue Hsieh

Wei-Hung Kang

Cheng-Shien Lee

Chin-Wang Hu

Hsiang-Chien Hsu

Cheng-Lung Duan

Tsung-Wen Tien

The invention provides a method for fabricating a camera module. An exemplary embodiment of the method for fabricating a camera module comprises providing plurality of lens sets. A dry film layer is formed on the plurality of lens sets. The dry film layer is patterned to form a plurality of dry film patterns respectively attaching to a plurality of lens sets. The plurality of lens sets are separated. A lens set separated from the plurality of lens sets is bonded to an image sensor device chip. The dry film pattern on the lens set is removed.

Method for fabricating camera module

Light emitting devices conformally covered by a luminescent material layer are presented. A light emitting device includes a semiconductor light emitting die attached to a substrate. At least one bond pad is disposed on the semiconductor light emitting die. A luminescent material layer conformally covers the semiconductor light emitting die, wherein the luminescent material layer has at least one opening corresponding to and exposing the at least one bond pad. At least one wirebond is electrically connected to the at least one bond pad and a contact pad on the substrate.

Light emitting device having luminescent layer with opening to exposed bond pad on light emitting die for wire bonding pad to substrate

According to embodiments of the invention, a lens assembly and method for forming the same is provided. The method includes providing a first lens layer having a first transparent substrate and a first lens on the first transparent substrate, providing a second lens layer having a second transparent substrate and a second lens on the second transparent substrate, forming a spacer structure between the first lens layer and the second lens layer, and thinning the first transparent substrate to a first thickness after the spacer is formed.

Lens assembly and method for forming the same

A semiconductor device is disclosed. The semiconductor device comprises a light-emitting diode chip disposed in a cavity of a semiconductor substrate. At least two isolated outer wiring layers are disposed on the bottom surface of the semiconductor substrate and are electrically connected to the light-emitting diode chip, serving as input terminals. A lens module is adhered to the top surface of the semiconductor substrate to cap the cavity, in which the lens module comprises a molded lens and a transparent conductive layer coated with a fluorescent material under the molded lens. A method for fabricating the semiconductor devices is also disclosed.

Light-emitting diode device and method for fabricating the same

A light-emitting diode (LED) device is disclosed. The LED device includes a semiconductor substrate with a planar top surface, a light-emitting diode (LED) chip disposed over the top surface of the semiconductor substrate, at least two isolated outer wiring layers formed through the semiconductor substrate and electrically connected to the light-emitting diode chip, serving as input terminals, a transparent encapsulating layer with a substantially planar top surface formed over the semiconductor substrate, capping the LED chip and the at least two isolated outer wiring layers, and a lens module adhered to the substantially planar top surface of the transparent encapsulating layer to cap the light-emitting diode chip. In one embodiment, the lens module includes a fluorescent layer and a lens covering or covered by the fluorescent layer.

An optoelectronic device chip, and a method for making the chip, are disclosed. The chip comprises a device substrate, an optically transparent upper substrate, and a composite spacer layer which includes an adhesive material and a plurality of particles dispersed in said adhesive material. The distance between the device substrate and the upper substrate is controlled by the thickness of the composite spacer layer so that the variation is within the depth of focus of optical system.

Optoelectronic device chip having a composite spacer structure and method making same

Isolation structure for CMOS image sensor device chip scale packages and fabrication methods thereof. A CMOS image sensor chip scale package includes a transparent substrate configured as a support structure for the package. The transparent substrate includes a first cutting edge and a second cutting edge. A CMOS image sensor die with a die circuitry is mounted on the transparent substrate. An encapsulant is disposed on the substrate encapsulating the CMOS image sensor die. A connection extends from the die circuitry to a plurality of terminal contacts for the package on the encapsulant, wherein the connection is exposed by the first cutting edge. An isolation structure is disposed on the first cutting edge passivating the exposed connection and co-planed with the second cutting edge.

Method of fabricating isolation structures for CMOS image sensor chip scale packages

Isolation structures for CMOS image sensor chip scale packages

A new sequence and chemical composition for cleaning the surface of a halftone shift masks that use MoSiON as shifter material is provided. For purposes of repair or rework, the pellicle is removed from the mask so that the mask can be accessed. After the rework or repair has been completed, a new clean process is performed, for the new clean process the sequence of steps that is conventionally performed has been modified. After the new clean process has been completed, the pellicle is reinstalled over the surface of the mask.

Cleaning process for phase shift masks

In accordance with the objectives of the invention a new method is provided for repairing photolithographic exposure masks. The invention uses an etch function of a conventional mask repair tool. The invention addresses defects that occur in a pattern of opaque material (such as chrome) created over the surface of an exposure mask whereby an (undesired) opening exists in the opaque material. The invention uses a focused E-beam exposure of the surface of the exposure mask to purposely &ldquo;damage&rdquo; this surface over the area where the opaque material is required to be present. Repair accuracy is in this manner easy to control, the conventional problem of peeling of the opaque or light sensitive material is eliminated.

Quartz damage repair method for high-end mask

A method of forming a mask from a metal layer deposited upon a substrate patterned for exposure of a workpiece to radiation of a specific range of wavelengths with the substrate being transparent to the radiation comprises the following steps. Form the metal layer superjacent to the substrate. Form a photoresist layer superjacent to the metal layer. Expose the photoresist layer to a pattern. Develop the photoresist to Form a photoresist mask with an opening therethrough. Bake the photoresist mask, the metal layer and the substrate. Perform a descum operation. Perform an isotropic etching of the metal layer through the opening in the mask. Perform an after etching inspection measurement. Strip the photoresist mask. Perform an after stripping inspection measurement. The isotropic etching is performed with a wet etchant. The descum operation is performed with a dry plasma process including oxygen and nitrogen gases and an inert gas selected from argon and helium.

Critical dimension controlled method of plasma descum for conventional quarter micron and smaller dimension binary mask manufacture

A method for fabricating planar lightwave circuits with at least one static-alignment fiber-guiding groove comprising the steps of: (a) fabricating a sandwiched Si-substrate by forming an etching stop layer on a first Si layer, followed by forming a second Si layer on the etching stop layer; (b) forming a waveguide layer on the Si-substrate, the waveguide layer containing at least one planar waveguide channel buried between a first cladding layer and a second cladding layer; (c) forming a photomask on the waveguide layer so as to allow the fiber-guiding grooves to be fabricated; (d) using the photomask and a first reactive ion etching procedure to form a first portion of the fiber-guiding groove, the first reactive ion etching procedure is controlled such that it etches through the waveguide layer and stops at the second Si layer; and (e) using the photomask and a second reactive ion etching procedure to form a second portion of the fiber-guiding groove, wherein the second reactive etching ion is selected in such a manner that the second reactive ion etching procedure etches only through the second Si layer and stops at the interface between the second Si layer and the etching stop layer. In a preferred embodiment, the etching stop layer comprises a glass material which is resistant to the second reactive etching ion, the fiber-guiding groove is a U-shaped groove, and the waveguide channel has a refractive index which differs from that of the first and second cladding layers by about 0.25%. The etching stop layer provides precise depth control and ensures the repeatibility of light coupling efficiency between the optical fiber and the waveguide, a critical element in lightwave circuits.

Growing community of inventors

Hsinchu, Taiwan

Tzy-Ying Lin