United Microelectronics Corp.

Other

Tzung-Ying Lee

Hsin-Fu Huang

Chin-Fu Lin

Chi-Mao Hsu

Kun-Hsien Lin

Min-Chuan Tsai

Chun-Mao Chiou

Cheng-Pu Chiu

Dien-Yang Lu

Chun-Kai Chao

Chin-Cheng Chien

Tsuo-Wen Lu

Shu-Yen Chan

Che-Hua Hsu

Zhi-Cheng Lee

Yi-Wen Chen

Jei-Ming Chen

Chun-Wei Hsu

Yu-Min Lin

Teng-Chun Tsai

Yi-Wei Chen

Chien-Ting Lin

Chan-Lon Yang

Chun-Yuan Wu

Chia-Lin Hsu

Chien-Ming Lai

Po-Cheng Huang

Chia-Lung Chang

Cheng-Guo Chen

Po-Jui Liao

Jie-Ning Yang

Tong-Jyun Huang

Shao-Hua Hsu

Guang-Yaw Hwang

Tsung-Lung Tsai

Hung-Ling Shih

Jung-Tsung Tseng

A semiconductor device includes a substrate having a logic region and a high-voltage (HV) region, a first gate structure on the HV region, a first epitaxial layer and a second epitaxial layer adjacent to one side of the first gate structure, a first contact plug between the first epitaxial layer and the second epitaxial layer, a third epitaxial layer and a fourth epitaxial layer adjacent to another side of the first gate structure, and a second contact plug between the third epitaxial layer and the fourth epitaxial layer. Preferably, a bottom surface of the first epitaxial layer is lower than a bottom surface of the first contact plug and a bottom surface of the third epitaxial layer is lower than a bottom surface of the second contact plug.

Semiconductor device

A method for fabricating a semiconductor device includes the following steps. Firstly, a dummy gate structure having a dummy gate electrode layer is provided. Then, the dummy gate electrode layer is removed to form an opening in the dummy gate structure, thereby exposing an underlying layer beneath the dummy gate electrode layer. Then, an ammonium hydroxide treatment process is performed to treat the dummy gate structure. Afterwards, a metal material is filled into the opening.

Method for fabricating semiconductor device

Provided is a semiconductor device including a substrate, a gate structure, a second dielectric layer and a source/drain region. A first dielectric layer is disposed on the substrate, and the first dielectric layer has a trench therein. The gate structure is disposed on the substrate in the trench and includes a work function metal layer and a metal layer. The work function metal layer is disposed in the trench, and includes a TiAlphase metal layer. A height of the work function metal layer disposed on a sidewall of the trench is lower than a height of a top surface of the first dielectric layer. The metal layer fills the trench. The second dielectric layer is disposed between the gate structure and the substrate. The source/drain region is disposed in the substrate at two sides of the gate structure.

A method of fabricating a semiconductor device includes following steps. A substrate is provided, wherein a first dielectric layer having a trench therein is formed on the substrate, a source/drain region is formed in the substrate at two sides of the trench, and a second dielectric layer is formed on the substrate in the trench. A first physical vapor deposition process is performed to form a Ti-containing metal layer in the trench. A second physical vapor deposition process is performed to form an Al layer on the Ti-containing metal layer in the trench. A thermal process is performed to anneal the Ti-containing metal layer and the Al layer so as to form a work function metal layer. A metal layer is formed to fill the trench.

Semiconductor device and method of fabricating the same

The present invention provides a method of manufacturing semiconductor device having metal gates. First, a substrate is provided. A first conductive type transistor having a first sacrifice gate and a second conductive type transistor having a second sacrifice gate are disposed on the substrate. The first sacrifice gate is removed to form a first trench. Then, a first metal layer is formed in the first trench. The second sacrifice gate is removed to form a second trench. Next, a second metal layer is formed in the first trench and the second trench. Lastly, a third metal layer is formed on the second metal layer wherein the third metal layer is filled into the first trench and the second trench.

Method of manufacturing semiconductor device having metal gates

A semiconductor device includes: a substrate having a first region and a second region; a first gate structure disposed on the first region, wherein the first gate structure comprises a first high-k dielectric layer, a first work function metal layer, and a first metal layer disposed between the first high-k dielectric layer and the first work function metal layer; and a second gate structure disposed on the second region, wherein the second gate structure comprises a second high-k dielectric layer, a second work function metal layer, and a second metal layer disposed between the second high-k dielectric layer and the second work function metal layer, wherein the thickness of the second metal layer is lower than the thickness of the first metal layer.

Semiconductor device with lower metal layer thickness in PMOS region

A method for manufacturing a MOS transistor is provided. A substrate has a high-k dielectric layer and a barrier in each of a first opening and a second opening formed by removing a dummy gate and located in a first transistor region and a second transistor region. A dielectric barrier layer is formed on the substrate and filled into the first opening and the second opening to cover the barrier layers. A portion of the dielectric barrier in the first transistor region is removed. A first work function metal layer is formed. The first work function metal layer and a portion of the dielectric barrier layer in the second transistor region are removed. A second work function metal layer is formed. The method can avoid a loss of the high-k dielectric layer to maintain the reliability of a gate structure, thereby improving the performance of the MOS transistor.

Metal oxide semiconductor transistor and method of manufacturing the same

Growing community of inventors

Pingtung County, Taiwan

Tzung-Ying Lee