Himax Technologies, Inc.

Prilit Optronics, Inc.

Ncku Research and Development Foundation

Tzung-Ren Wang

Biing-Seng Wu

Ming-Der Shieh

Der-Wei Yang

Hsin-Hung Chen

Chao-Wen Wu

Chun-Wei Chen

Han-Shui Hsueh

Mu-Hsien Hsu

Yun Chen Chang

Li-Chia Chu

Chia-Cheng Lo

Chou-Liang Tsai

A mixed reality display system includes a transparent display, through which users on both sides see each other; a plural pairs of shutter glasses worn by the users, each pair of shutter glasses being composed of a left glass and a right glass; and a controller that synchronizes the transparent display and the shutter glasses.

Mixed reality display system

A pulse-width modulation (PWM) circuit includes a partition circuit coupled to receive a PWM value representing a duty cycle of a PWM signal to be generated, and configured to accordingly generate a most-significant-bits (MSB) value representing higher-order bits of the PWM value and a least-significant-bits (LSB) value representing lower-order bits of the PWM value; a PWM generator coupled to receive the MSB value or a derivative thereof, and configured to accordingly generate a primary signal with a duty cycle corresponding to the MSB value; a delay circuit that generates a delay signal representing the primary signal with delay time determined according to the LSB value or a derivative thereof; and a combine circuit that generates the PWM signal according to the primary signal and the delay signal, by performing a logical operation on the primary signal and the delay signal.

Pulse-width modulation circuit

A micro-light-emitting diode (microLED) display panel includes a timing controller, and a plurality of drivers controlled by the timing controller and arranged in an order according to distance from the timing controller. Each driver includes a buffer that buffers a signal before being sent to a succeeding driver.

Micro-light-emitting diode display panel having a plurality of drivers connected by buffers

A display system includes a display panel that includes a plurality of micro-light-emitting diodes (microLEDs), the display panel being divided into a plurality of display blocks; and a plurality of drivers correspondingly driving the plurality of display blocks. Data signals of each driver are provided to a corresponding display block at different times within a horizontal scan period.

Display system

A vacuum suction apparatus includes a semiconductor substrate with a top portion having grooves and a bottom portion having through holes, wherein each said groove correspondingly connects with at least one said through hole, and the groove has a width greater than a width of the through hole; and a cover plate disposed on a top surface of the semiconductor substrate. At least one edge of the vacuum suction apparatus has a vacuum chamber, which connects with the grooves. In another embodiment, the cover plate is replaced with a vacuum cover disposed above the semiconductor substrate, wherein the vacuum cover and the semiconductor substrate construct a vacuum chamber.

Vacuum suction apparatus

Fingerprint image processing method and device are provided, and the fingerprint image processing method includes following steps. A plurality of first fingerprint features are extracted from a fingerprint image by a first search algorithm. An inverse process is performed on the fingerprint image to obtain an inverse fingerprint image. A plurality of reference features are extracted from the inverse fingerprint image by the first search algorithm. A plurality of second fingerprint features are obtained from the fingerprint image based on coordinates of the reference features.

Fingerprint image processing method and device

A content adaptive compression system includes a plurality of encoders being coupled to receive a portion of an image, and accordingly generating candidate compressed codes, respectively, the plurality of encoders being configured for encoding images of different contents. An error count unit is configured to determine an amount of error between the image and the candidate compressed code for each of the encoders. A mode decision unit is coupled to receive a plurality of the amount of error, the candidate compressed code associated with least amount of error being outputted as an adaptive compressed code for the image.

Content adaptive compression system

An auto-contrast enhancement system includes a human visual system (HVS)-based local difference (LD) histogram unit configured to build a LD histogram with respect to intensity values; a histogram classifier configured to categorize histograms of input images based on distribution properties; and a histogram equalization (HE) unit configured to process the input image according to a result of the HVS-based LD histogram unit and the enhancement level determined in the histogram classifier.

Auto-contrast enhancement system

A system of image stereo matching includes at least one stereo matching unit (SMU) each receives a first view and a second view of a view pair, according to which the SMU generates a first depth map for the first view. The system also includes a backward tracer operable to receive the first depth map, according to which a second depth map for the second view is derived.

System of image stereo matching

In some embodiments, a method of rendering a stereoscopic image based on a two-dimensional image frame and a depth map comprises generating a saliency map of the two-dimensional image frame, determining a region where is located an object of focus from the saliency map, modifying the depth map such that a range of depth values in the depth map that is associated the object of focus is redistributed toward a depth level of a display screen, and generating a virtual stereoscopic image frame based on the modified depth map and the two-dimensional image frame. In other embodiments, systems of rendering stereoscopic images are also described.

System and method of rendering stereoscopic images

A 3D stereoscopic image processing system comprises a receiver unit and an image processing unit. The receiver unit is adapted to receive a pair of stereoscopic images. The image processing unit is adapted to compute a first depth map from the pair of stereoscopic images, determine extreme depth values from a window selected in the depth map, determine a filter map based on the extreme depth values, and compute a second depth map by combining the filter map with the first depth map. In other embodiments, a method of processing stereoscopic images is provided, comprising computing a first depth map from a pair of stereoscopic images, generating a filter map associated with the first depth map, and combining the first depth map with the filter map to derive a second depth map.

System and method of processing 3D stereoscopic image

A multimedia processor includes an audio processor configured to process an audio input signal to generate an audio output signal and an assistant signal, and a video processor coupled with the audio processor and configured to process video input signal and the assistant signal to generate a video output signal simultaneously according to the video input signal and the assistant signal. Provided with the assistant signal, the video processor acquires more video processing-related information for rendering video content in a more realistic manner. Mal-motion detection can thus be prevented, and video quality can be improved.

System and method for processing multimedia data using an audio-video link

A bit block transfer (Bitblt) circuit includes a read register, a write register, a bit shifting circuit and an overflowing register. The read register stores decomposition data including original data. The bit shifting circuit shifts the decomposition data in the read register to the write register and shifts bits of the decomposition data in the write register such that an initial bit of the original data of the decomposition data is situated apart from an initial address of the write register by a bit-shifting amount. The overflowing register coupled to the write register stores overflowing data of the original data overflowing from a memory length of the write register when the bits of the decomposition data in the write register are being shifted. The write register outputs and writes the decomposition data therein to a memory cell of a first memory.

Bit block transfer circuit and method thereof and color filling method

A method of for accessing a first-in-first-out (FIFO) buffer is provided. The method comprises the following two steps. Firstly, issue a request to access a memory when the amount of the data buffered in the FIFO buffer is more than a threshold. Second, pop the data buffered in the FIFO buffer out to access the memory when the request is granted. If the FIFO buffer is a single-port FIFO buffer, the threshold is set based on the burst length of one burst of data. If the FIFO buffer is a dual-port FIFO buffer, the threshold is set based on the speed at which the data is pushed into the FIFO buffer and the speed at which the data is popped out of the FIFO buffer.

Growing community of inventors

Tainan, Taiwan

Tzung-Ren Wang