Realtek Semiconductor Inc.

Tzung-Jin Wu

Ying-Yen Chen

Po-Lin Chen

Jeong-Fa Sheu

Yin-Ping Chern

A circuit having multiple scan modes is disclosed. The circuit includes a first circuit block and a second circuit block. The first circuit block corresponds to a first scan mode of the multiple scan modes, and the first circuit block includes at least one first scan chain for receiving a test signal from an external automatic test equipment. The second circuit block corresponds to a second scan mode of the multiple scan modes, and the second circuit block includes at least one second scan chain for receiving another test signal from the external automatic test equipment. The second scan chain includes at least one specific flip-flop positioned in the first circuit block, and the specific flip-flop is configured to drive the second circuit block.

Growing community of inventors

Taipei, Taiwan

Tzung-Jin Wu