Taiwan Semiconductor Manufacturing Comp. Ltd.

Tzu-Hsiang Hsu

Chung-Te Lin

Yen-Ming Chen

Feng-Cheng Yang

Wei-Yang Lee

Shih-Hao Lin

Hsin-Wen Su

Ting-Yeh Chen

Chih-Hsiang Huang

Szu-Chi Yang

Chong-De Lien

Pin-cheng Hsu

Yi-Cheng Chu

A transistor includes a gate electrode, a gate dielectric, a channel layer and a source line and bit line. The gate electrode includes a first gate material layer and a second gate material layer disposed on the first gate material layer, wherein a work function of the first gate material layer is lower than a work function of the second gate material layer. The gate dielectric is disposed on the gate electrode. The channel layer is disposed on the gate dielectric. The source line and bit line are disposed on and connected to the channel layer.

Integrated circuit, transistor and method of fabricating the same

A semiconductor structure includes a semiconductor fin disposed over a substrate, a metal gate stack disposed over the semiconductor fin, an epitaxial source/drain (S/D) feature disposed over the semiconductor fin and adjacent to the metal gate stack, and a dielectric feature embedded in the semiconductor fin, where a bottom surface of the epitaxial S/D feature is disposed on a top surface of the dielectric feature, and where sidewalls of the epitaxial S/D feature extend to define sidewalls of the dielectric feature.

Methods of forming epitaxial source/drain features in semiconductor devices

Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary method comprises forming first and second semiconductor fins in first and second regions of a substrate, respectively; forming first and second dummy gate stacks over the first and second semiconductor fins, respectively, and forming a spacer layer over the first and the second dummy gate stacks; forming a first pattern layer with a thickness along the spacer layer in the first region; form a first source/drain (S/D) trench along the first pattern layer and epitaxially growing a first epitaxial feature therein; removing the first pattern layer to expose the spacer layer; forming a second pattern layer with a different thickness along the spacer layer in the second region; form a second S/D trench along the second pattern layer and epitaxially growing a second epitaxial feature therein; and removing the second pattern layer to expose the spacer layer.

Semiconductor device with tunable epitaxy structures and method of forming the same

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Hsinchu County, Taiwan

Tzu-Hsiang Hsu