Taiwan Semiconductor Manufacturing Comp. Ltd.

Tzu-Hsiang Chen

Jhy-Jyi Sze

Chia-Chen Chen

Seiji Takahashi

Jeng-Horng Chen

Cheng-Yuan Tsai

Yu-Jen Wang

Shang-Chieh Chien

Cheng-Hsien Chou

Chia-Hao Hsu

Tsung-Yu Chen

Sheng-Chan Li

Yen-Ting Chiang

Shu-Hao Chang

Jui-Ching Wu

Ming-Chin Chien

Chia-Ching Huang

I-Nan Chen

Jiech-Fun Lu

Yen-Cheng Lu

Shih-Pei Chou

Po-Han Huang

Shun-Der Wu

The present disclosure relates to a CMOS image sensor. The image sensor comprises a pixel region comprising a photodiode disposed within a substrate. A deep trench isolation (DTI) ring encloses the photodiode from top view and extends from a back-side to a first position within the substrate from cross-sectional view. A pair of shallow trench isolation (STI) structures is respectively disposed at an inner periphery and an outer periphery sandwiching the DTI ring from top view and extends from a front-side to a second position within the substrate from cross-sectional view. A pixel device is disposed at the front-side of the substrate directly overlying the DTI ring. The pixel device comprises a gate electrode disposed over the substrate and a pair of source/drain (S/D) regions disposed within the substrate and reaching on a top surface of the DTI ring.

Pixel device on deep trench isolation (DTI) structure for image sensor

The present disclosure relates to a CMOS image sensor having a pixel device on a deep trench isolation (DTI) structure, and an associated method of formation. In some embodiments, the DTI structure is disposed at a peripheral of a pixel region, extending from a back-side of the substrate to a position within the substrate. A pixel device is disposed at the front-side of the substrate directly overlying the DTI structure. The pixel device comprises a pair of source/drain regions disposed within the substrate and reaching on a top surface of the DTI structure. A second trench isolation structure is disposed from the front-side at an inner peripheral of the first trench isolation structure. The first trench isolation structure has a top surfaces locating at a position of the substrate vertically exceeding bottom surfaces of the second trench isolation structure.

A semiconductor structure is disclosed. The semiconductor structure includes: a semiconductor substrate having a front surface and a back surface facing opposite to the front surface; a filling material extending from the front surface into the semiconductor substrate without penetrating through the semiconductor substrate, the filling material including an upper portion and a lower portion, the upper portion being in contact with the semiconductor substrate; and an epitaxial layer lined between the lower portion of the filling material and the semiconductor substrate. An associated manufacturing method is also disclosed.

Semiconductor structure and method of manufacturing the same

An optical isolation structure and a method for fabricating the same are provided. The optical isolation structure includes an epitaxial layer and a dielectric layer. The epitaxial layer and the dielectric layer are formed in a deep trench of a semiconductor substrate. The epitaxial layer covers a lower portion of sidewall of the trench, and the dielectric layer covers an upper portion of the sidewall of the trench. In the method for fabricating the optical isolation structure, at first, shallow trenches are formed in the semiconductor substrate. Then, the dielectric layer is formed in the shallow trenches. Thereafter, deep trenches are formed passing through the dielectric layers. Then, the epitaxial layer is formed in the deep trenches.

Optical isolation structure for reducing crosstalk between pixels and fabrication method thereof

The present disclosure relates to a CMOS image sensor having a pixel device on a deep trench isolation (DTI) structure, and an associated method of formation. In some embodiments, a deep trench isolation (DTI) structure is disposed at a peripheral of a pixel region, extending from a back-side of the substrate to a position within the substrate. A pixel device is disposed at the front-side of the substrate directly overlying the DTI structure. The pixel device comprises a pair of source/drain (S/D) regions disposed within the substrate and reaching on a top surface of the DTI structure. By forming the disclosed pixel device directly overlying the DTI structure to form a SOI device structure, short channel effect is reduced because of the room for pixel device and also because the insulation layer underneath the pixel device. Thus higher device performance can be realized.

An EUV collector is rotated between or during operations of an EUV photolithography system. Rotating the EUV collector causes contamination to distribute more evenly over the collector's surface. This reduces the rate at which the EUV photolithography system loses image fidelity with increasing contamination and thereby increases the collector lifetime. Rotating the collector during operation of the EUV photolithography system can induce convection and reduce the contamination rate. By rotating the collector at sufficient speed, some contaminating debris can be removed through the action of centrifugal force.

Rotary EUV collector

An extreme ultraviolet (EUV) radiation source module includes a target droplet generator, a first laser source, and a second laser source. The target droplet generator is configured to generate a plurality of target droplets. The first laser source is configured to generate a plurality of first laser pulses that heat the target droplets at respective excitation positions thereby generating a plurality of target plumes. At least one of the target droplets is heated at an excitation position different from that of other target droplets. The second laser source is configured to generate a plurality of second laser pulses that heat the target plumes thereby generating plasma emitting EUV radiation.

Extreme ultraviolet lithography collector contamination reduction

Some embodiments of the present disclosure related to a method to form and operate the reflective surface to compensate for aberration effects on pattern uniformity. In some embodiments, the reflective surface comprises a mirror of within reduction optics of an EUV illumination tool. In some embodiments, the reflective surface comprises a reflective reticle. An EUV reflective surface topography comprising a reflective surface is disposed on a surface of a substrate, and is manipulated by mechanical force or thermal deformation. The substrate includes a plurality of cavities, where each cavity is coupled to a deformation element configured to expand a volume of the cavity and consequently deform a portion of the reflective surface above each cavity, for local control of the reflective surface through thermal deformation of a resistive material subject to an electric current, or mechanical deformation due to pressurized gas within the cavity or a piezoelectric effect.

Wavefront adjustment in extreme ultra-violet (EUV) lithography

Some embodiments of the present disclosure relate to a tool configuration and method for EUV patterning with a deformable reflective surface comprising a mirror or reticle. A radiation source provides EUV radiation which is reflected off the deformable reflective surface to transfer a reticle pattern to a semiconductor workpiece. A metrology tool measures a residual vector formed between a first shape of the semiconductor workpiece and a second shape of the reticle pattern. And, a topology of the deformable reflective surface is changed based upon the residual vector to minimize a total magnitude of the residual vector.

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Zhubei, Taiwan

Tzu-Hsiang Chen