International Business Machines Corporation

Tyler D Kieft

Karl V Swanke

Mark J Flemming

Alexander Joseph Franz

Matthew S Turnbull

Matthew Walker

Raghav Kohli

A tool and method is provided to graphically correlate process and test data with specific chips on a multi-project wafer. The tool and method is configured and implemented to select certain sites and export these sites to an industry standard map that can be used in a variety of chip picking or test tools. In one embodiment, the method includes importing a wafer floor plan with chips of different design parameters and importing manufacturing logistical information of the chips. The method further includes graphically rendering each chip on the wafer to scale within a unit cell using the imported wafer floor plan and the manufacturing logistical information.

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Essex Junction, VT, United States of America

Tyler D Kieft