Huawei Technologies Co., Limited

Tyler Bryce Nowicki

Ahmed Mohammed ElShafiey Mohammed Eltantawy

Yan Luo

Guansong Zhang

Andrew Siu Doug Lee

Abraham Davidson Fai Chung Chan

David William John Pankratz

There is described a method of shading a group of pixels in a fragment shader in a raster graphics pipeline. At least one first pilot pixel of the group of pixels is shaded under a first precision. At least one second pilot pixel of the group of pixels is shaded under a second precision. An error value representing a difference between the first and second pilot pixels is calculated. At least one other pixel of the group of pixels is shaded under the first precision if the error value is greater than an error threshold. The at least one other pixel is shaded under the second precision if the error value is smaller than the error threshold.

Apparatus, method, and computer-readable medium for image processing using variable-precision shading

There is provided a method and apparatus for supporting an image rendering using ray tracing. For at least some elements (e.g. pixels), ray tracing results for previously evaluated elements are used to predict ray tracing results for the current element. These previously evaluated elements can be elements which are proximate to the current element. Feasibility testing and prediction can be performed to determine whether a prediction can be made, and the ray hit test and the opaqueness testing can determine whether the prediction is valid. If testing fails, a full ray tracing operation can be performed for the current element. The operations can be implemented using multithreading. Ray tracing patterning and resolution of elements used for prediction purposes can be adjusted based on prior performance.

Method and apparatus for supporting an image rendering using ray tracing

The disclosed systems, structures, and methods are directed to parallel processing of tasks in a multiple thread computing system. Execution of an instruction sequence of a thread allocated to a first task proceeds until an exit point of the instruction sequence is reached. The execution of the instruction sequence of the thread for the first task is terminated at a convergence point of the instruction sequence. The thread is selectively reallocated to process a second task.

Method and system for parallel processing of tasks in multiple thread computing

Systems and methods are described for extending a live range for a virtual scalar register during compiling of a program, comprising: receiving an intermediate representation (IR) of a source code configured for implementing single-instruction-multiple-thread (SIMT) execution, the IR representing the source code as control flow graph including a plurality of basic blocks (BB); and when a virtual scalar register defined in a first BB of the IR is last used in a second BB of the IR that is a divergent BB, modifying the IR to extend the live range of the virtual scalar register.

Systems and methods for extending a live range of a virtual scalar register

Methods and systems for executing threads in a thread-group, for example for ray-tracing. The threads are processed to collect, for each thread, a respective set of function call indicators over a respective number of call instances. The function call indicators are reordered across all threads and all call instances, to coalesce identical function call indicators to a common call instance, and non-identical function call indicators are reordered to different call instances. Function calls are executed across the threads of the thread-group, according to the reordered and coalesced function call indicators. In ray-tracing applications, the threads represent rays, each call instance is a ray-hit of a ray, and each function call is a shader call.

Methods and apparatuses for coalescing function calls for ray-tracing

The disclosed systems, apparatuses and methods are directed to optimizing by a compiler register resource allocation for functions of a module, using a Register File comprising a limited number of registers. After performing interprocedural analysis in the module, the compiler computes the number of registers used by each function, and compiles the function to final machine code, except at callsites where a call is detected to be made to another function. At each callsite and for each called function, the compiler expands call instructions to final machine code after computing and setting a relative index to be used by a called function for running in an available part of the Register File. The relative index optimizes register resource allocation by minimizing the number of spilled registers before a function is called.

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Mississauga, Canada

Tyler Bryce Nowicki