Xilinx, Inc.

Tuyet Ngoc Simmons

Andrew W Lai

Michael Leonard Simmons

Madan Mohan Patra

Brian Sadler

Andy T Nguyen

Shankar Lakkapragada

Randy J Simmons

Prasad Rau

Andrew Wing-Leung Lai

Testing an integrated circuit (IC) having numerous terminals coupled to numerous digitally controlled impedance (DCI) modules, where the numerous DCI modules control configurable impedances of the numerous terminals. The IC further includes a control circuit having outputs coupled to enable inputs of the numerous DCI modules, where operating the IC in a test mode configures the control circuit to selectively couple a control signal to the enable terminals of the numerous DCI modules. One DCI module of the numerous DCI modules can be enabled at a time facilitating testing of the configurable impedances of the I/O terminals.

Testing an integrated circuit having configurable input/output terminals

Testing an integrated circuit using dedicated function pins in a non-dedicated function test mode is described. In a first mode, a circuit block is activated for processing first information provided via dedicated function pins. In a second mode, the circuit block is deactivated. Control logic is coupled to receive state information from a state storing device and coupled to receive the first information and second information from the dedicated function pins. The control logic is configured to gate the second information for passage to programmable logic responsive to the state information being for the second mode. The control logic is configured to gate the first information to preclude passage to the programmable logic responsive to the state information being for the first mode.

Testing an integrated circuit using dedicated function pins

A test setup is provided to test differential signals outputs from the I/O block (IOB) pairs in an integrated circuit (IC). The test setup allows elimination of the external 100 Ohm resistors provided across the differential outputs on a device under test (DUT) test board containing the IC by taking advantage of a 100 Ohm resistor built into the IC between a portion of the IOB pairs. An IOB pair being tested may have its differential output terminal pair shorted to the differential output terminal pair of the IOBs having the internal 100 Ohm resistor.

Testing differential signal standards using device under test's built in resistors

Method and apparatus for providing shorted pin information for constructing a device under test (DUT) board for integrated circuit testing is described. In one example, an interface to an application module that implements pin-shorting rules associated generally with a plurality of integrated circuits and stores package files associated with specific ones of the integrated circuits is provided. A device and a package defining one of the plurality of integrated circuits are selected via the interface. At least one query is executed against the pin-shorting rules and the package files stored in the database via the interface. A shorted pin plan for the device and the package as selected is generated based on information obtained in response to the at least one query.

Method and apparatus for providing shorted pin information for integrated circuit testing

A method and apparatus is provided to utilize the configurability of a programmable logic device (PLD), so as to reduce the complexity of special test equipment (STE) fixtures that are required to test the PLD. The output drivers of certain I/O buffers of the PLD that are not under test may be configured to exhibit a particular impedance magnitude. The impedance magnitude of the output drivers that are not under test may then be used to supply the reference impedance that is required by the digitally controlled impedance (DCI) controllers of the I/O buffers that are under test. The DCI controllers may then correctly configure the impedance magnitude of the respective I/O buffers under test, so as to test the functionality of the controlled impedance buffers for I/O standards that require controlled impedance.

Method and apparatus for testing a controlled impedance buffer

Method and apparatus for testing input/output circuits of an integrated circuit are described. An integrated circuit includes input/output circuits having input/output pads. The input/output pads are capable of being coupled together to a tester channel. The input/output circuits each are configurable via configuration circuitry to be in either a first mode or a second mode responsive to a select circuit of the configuration circuitry coupled to receive a first input for the first mode and a second input for the second mode. The select circuit is controlled responsive to a control select signal common to all or a portion of the select circuits of each of the input/output circuits.

Testing of input/output devices of an integrated circuit

Testing an integrated circuit having programmable logic is described. Programmable logic is configured as a daisy-chain of registers (-through-(N+1)) in a closed input/output loop to register a logic 1 and logic 0s. The logic states are circulated around the closed input/output loop. Operation of output blocks (-through-N) is controlled responsive to a series of outputs (-through-N) provided from a portion of the daisy-chain of registers (-through-N) to selectively place an output block of output blocks (-through-N) in an output mode responsive to the logic 1 output in the series of outputs while leaving the output blocks remaining in a non-output mode responsive to the logic 0s in the series of outputs. The output blocks (-through-N) are commonly coupled at an output node () for coupling to a single test channel, as only one output block is in the output mode at a time.

Test channel usage reduction

A method for accurate testing of the output voltage of an integrated circuit comprises enabling a differential voltage comparator on the integrated circuit to be tested. One input to the differential comparator is set to a reference voltage, and the other input is coupled to a node to be tested. A current load is injected at the node, and the output of the voltage comparator can be used to determine if the integrated circuit performs within the specifications set by a manufacturer.

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Monte Sereno, CA, United States of America

Tuyet Ngoc Simmons