Pensando Systems Inc.

Tuyen Van Quoc

Sameer Kittur Subrahmanya

Harinadh Nagulapalli

Murty Subba Rama Chandra Kotha

Murty Kota

Varagur Chandrasekaran

Pirabhu Raman

Balakrishnan Raman

Vishwas Danivas

Paul Mathison

Kit Chiu Chu

Mohankumar R Tiruvayapadi

Hui Peng

The rate limiter circuits in the packet processing chip of a NIC are a limited hardware resource that may limit the number of workloads that can be run on a server. Some such chips include an egress packet processing pipeline circuit and a second packet processing pipeline circuit that prepares work for the egress pipeline circuit. Some of the stages of the second pipeline circuit can be configured as a first limiter and a second limiter that implement aspects of different rate limiters such as IOPS limiters, bandwidth limiters, etc. Another pipeline stage can use the outputs of the different rate limiters to make a limiting decision that is written into one of the rate limiter circuits. The second pipeline circuit is thereby implementing virtualized rate limiters where one of the rate limiter circuits performs the rate limiting for the virtualized rate limiters.

Systems and methods for using a packet processing pipeline circuit to extend the capabilities of rate limiter circuits

Methods and systems for implementing traffic mirroring for network telemetry are disclosed. An embodiment of a method for implementing traffic mirroring for network telemetry involves identifying network traffic at a network appliance that is to be subjected to traffic mirroring for network telemetry, and selecting from available options of transmitting enhanced mirrored network traffic from the network appliance to a collector, wherein the enhanced mirrored network traffic is generated at the network appliance by at least one of compressing and encrypting the network traffic, and transmitting mirrored network traffic from the network appliance to the collector without compressing or encrypting the network traffic.

Methods and systems for implementing traffic mirroring for network telemetry

A network appliance can be configured for storing a plurality of flow table entries in a flow table of a match-action pipeline, wherein the match-action pipeline is implemented via a packet processing circuit configured to process a plurality of network traffic flows associated with the plurality of flow table entries. An extended packet processing pipeline of the network appliance can read a flow table entry of the flow table. The extended packet processing pipeline can be implemented via a pipeline circuit. The extended packet processing pipeline can determine that a network traffic flow associated with the flow table entry is expired or terminated. The network appliance can delete the flow table entry from the flow table by processing a traffic flow deletion operation after determining that the network traffic flow is expired or terminated.

Methods and systems for removing expired flow table entries using an extended packet processing pipeline

Described are platforms, systems, and methods for processing a chain of operations through an input output (IO) subsystem without central processing unit (CPU) involvement. In one aspect, a computer-implemented method comprises: providing, via the CPU, the chain of operations to the IO subsystem, wherein the IO subsystem is coupled to the one or more processors over Peripheral Component Interconnect Express (PCIe); processing, with the IO subsystem, the chain of operations by: retrieving, from a memory, data associated with the chain of operations; executing each of the operations in the chain to determine an output based on the data and output determined for any prior executed operation in the chain; and providing the output of each the executed operations for execution of the respective next operation in the chain; and providing, via the IO subsystem, an output for the chain of operations to the CPU.

Flexible datapath offload chaining

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San Jose, CA, United States of America

Tuyen Van Quoc