Luminar Technologies, Inc.

Em Microelectronic-marin Sa

Black Forest Engineering, LLC

Tue Tran

Stephen D Gaalema

Jason M Eichenholz

Joseph G LaChapelle

Scott R Campbell

Austin K Russell

Daniel Arthur Staver

Bruce Carl Wall

David Dobyns

William Bahn

To decrease the likelihood of a false detection when detecting light from light pulses scattered by remote targets in a lidar system, a receiver in the lidar system includes a photodetector and a pulse-detection circuit having a gain circuit with a varying amount of gain over time. The gain circuit operates in a low-gain mode for a time period Tbeginning with time twhen a light pulse is emitted to prevent the receiver from detecting return light pulses during the threshold time period T. Upon expiration of the threshold time period T, the gain circuit operates in a high-gain mode to begin detecting return light pulses until a subsequent light pulse is emitted.

Time varying gain in an optical detector operating in a lidar system

In one or more embodiments, an apparatus and method for processing an analog signal into a digital signal includes an input current buffer circuit, a signal charge integration node, a dual function comparator, a step charge subtractor, a state latch, a coarse N-bit counter, an optional residue signal buffer and a residue signal M-bit time-to-digital (TDC) converter. The circuitry is free running, meaning that it is never reset. Instead, what is tracked for each frame is how much additional charge has been accumulated since the end of the previous integration period. Between each frame, the state of the counter and the amount of charge residing in the integration node are recorded. This information from the beginning and end of a given frame is differenced and to this is added the amount of charge indicated by the number of times the counter overflowed during the integration period.

Low power ADC for high dynamic range integrating pixel arrays

A two-wire communication protocol between a controller device and a controlled device, wherein both devices are coupled by a clock line and a data line. The controller device sends control signals comprising N bits, N being greater than or equal to two, to the controlled device via the data line. Each bit of said control signals is latched onto the controlled device on consecutive edges of a clock signal sent by the controller device to the controlled device on the clock line.

Simple two-wire communication protocol with feedback status

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Colorado Springs, CO, United States of America

Tue Tran