Solantro Semiconductor Corp.

Skyworks Solutions, Inc.

Hittite Microwave Corporation

Tudor Lipan

Raymond Kenneth Orr

Mark M Cloutier

Christian Cojocaru

Christian Dino Gerolami

Norman J Beamish

James Benson Bacque

John E Vasa

Ardeshir Namdar-Mehdiabadi

Igor Miletic

Gabriel Scarlatescu

Balasubramanian Ramachandran

Gord Allan

Gerald Augustoni

Alexandru Dorin Nicolescu

Michael Sawires

Mark Miles Cloutier

A Galvanically Isolated Amplifier (GIA) includes an isolation barrier to galvanically isolate high voltage circuitry from low voltage circuitry. The high voltage circuitry has at least two voltage supply rails, with the voltage supply rail closest to ground potential at a first potential relative to the ground potential. The low voltage circuitry has at least two voltage supply rails, with the voltage supply rail closest to the ground potential at a second potential, the second potential being smaller than the first potential. A Radio Frequency (RF) carrier is digitally Phase Shift Keying (PSK) modulated for transmission across the isolation barrier. The unmodulated RF carrier could also be transmitted across the isolation barrier. PSK modulation could be applied to the RF carrier based on a test waveform to generate a PSK-modulated test signal for transmission while a voltage transient is applied between the high voltage circuitry and the low voltage circuitry.

Galvanically isolated amplifiers and related methods

Power converter communications, including power converter communication methods and power converters that can communicate information, are disclosed. A control variable of a power converter is modulated, to modulate an output of the power converter for communicating information. Modulation of voltage or current on a circuit path to which the power converter is coupled could be detected, by another power converter, for example. Such modulation could be detected by sensors that are also used in controlling the power converter. Either or both of transmission and reception could therefore be provided without requiring any additional hardware at a power converter.

Power converter communications

In event-based switching for power conversion, binary electrical event signals are selected from a number of available binary electrical event signals. Fewer than all of the available binary electrical event signals are selected. The selected binary electrical event signals are optionally processed in generating respective processed binary electrical event signals. One of the respective processed binary event signals is selected as a switch turn-on signal and another of the respective processed binary electrical event signals is selected as a switch turn-off signal, to control at least one switch in a switching mode power converter.

Event-based switching for power conversion

Photovoltaic system maximum power point tracking methods and apparatus are disclosed. Output power samples from one or more photovoltaic (PV) cells are obtained. The output power samples include perturbed samples for which a perturbation is applied to an operating voltage or current of the PV cell(s) and non-perturbed samples for which no perturbation is applied to the operating voltage or current. A control output, to change the operating voltage or current of the PV cell(s) for a next perturbed sample by a next perturbation, is generated. The next perturbation could be based on an estimated change in output power due to a previous perturbation. The next perturbation could also or instead be in a direction based on a change in output power samples, and of a magnitude based on the direction and a direction of perturbations applied for one or more perturbed samples preceding the next perturbed sample.

Photovoltaic system maximum power point tracking

Inverter internal communication features are disclosed. A multiple-stage inverter includes DC to DC and DC to AC converter switches in different power domains, which share no common return path connection. Operating parameters for converter switches in both power domains are determined by a single controller, located in one of the power domains. Converter control signals are communicated from the controller across an interface between the power domains. Respective, separate controllers in each power domain are not required. Components on each side of the interface could be integrated into respective integrated circuits. A planar transformer implemented in wiring levels of a Printed Circuit Board (PCB) that carries components of the inverter could be provided to enable communications between the power domains while reducing component count and physical space requirements.

Internal inverter communications

A method for controlling local oscillator (LO) feed-through in a direct transmitter includes detecting a signal level corresponding to LO feed-through in a radio frequency (RF) signal that is output by a direct transmitter. Responsive to detecting the signal level corresponding to LO feed-through, DC offset levels are modified for an in-phase (I) signal and/or a quadrature-phase (Q) signal in the direct transmitter.

Systems and methods for controlling local oscillator feed-through

A system and method of monitoring a photovoltaic (PV) installation includes providing a string of multiple panel interface device enabled PV panels; operatively connecting an inverter to the string; operatively connecting at least one PV panel to the string; discharging an input capacitance of the inverter; comparing a current in the string to a predetermined current threshold value; and controlling connection of the at least one PV panel to the string based on the comparing of the current in the string to the predetermined current threshold value. A panel interface device may be used to discharge the input capacitance of the inverter.

String continuity monitoring

An active clamp circuit includes a clamp capacitance and a clamp switch coupled in a circuit path, and a diode coupled across the clamp switch.

Switching mode power supply using pulse mode active clamping

A fractional-N frequency synthesizer having an exact output frequency and phase includes a phase locked loop including a phase detector responsive to a reference signal and a fractional divider. The phase locked loop has an output signal whose frequency is a fractional multiple of the input reference signal. The synthesizer also includes a modulator having a modulus for providing an output to the fractional divider, in which the modulus multiplied by the ratio of the frequency of the output signal to the frequency of the reference signal is a non-integer number.

Fractional phase locked loop having an exact output frequency and phase and method of using the same

An integrated ramp, sweep fractional frequency synthesizer system on an integrated circuit chip includes an integrated circuit chip having a fractional frequency synthesizer with a fractional divider responsive to a VCO and a &#x394;&#x3a3; modulator for modifying the divisor of the fractional divider; and a ramp generator on the same integrated circuit chip; the ramp generator being responsive to a trigger signal to generate a ramp for sweeping the frequency of said fractional frequency synthesizer.

Integrated ramp, sweep fractional frequency synthesizer on an integrated circuit chip

An improved method of cycle slip prevention in a frequency synthesizer is achieved by determining phase error between a divided VCO and reference, determining whether a phase error of a full cycle slip has occurred and in which direction and altering the phase of the VCO divided signal in the amount and direction to reduce the phase error to less than one reference cycle. The result is an improved transfer function of the PFD, proportional to the phase error in the region &#x2212;2*pi to 2*pi, and fixed close to maximum when the phase error exceeds the above interval. This invention is achieved with the addition of digital circuitry to monitor and control the PFD and the VCO divider, and does not require additional analog charge pump circuitry.

System and method for cycle slip prevention in a frequency synthesizer

A receiver for a multi-mode wireless device is provided. The receiver has multiple analog RF front end modules, with each module supporting a different mode of operation. The receiver has a single digital backend module for generating a digital baseband signal. A controller selects one of the available RF modules to use, and the selected RF module provides an analog communication signal to the digital backend. Each available mode has an associated set of factors. When a particular mode is selected, the set of factors associated with the selected mode is provided to the digital backend. The digital backend uses these factors to adjust the processing characteristics of its components, such as its analog to digital converter, filters, and gain controller. In this way, the single digital backend is adaptable to the requirements of each of the available radio modes.

Receiver for a multimode radio

An (N&#x2212;1)/N prescaler is provided, where N is an S power of 2. The prescaler uses only S flip-flops. The (N&#x2212;1)/N prescaler receives a clock input from a high frequency oscillator, and provides an output line to a counter. The (N&#x2212;1)/N prescaler receives a divide-by-(N&#x2212;1) signal from the counter, and responsive to the divide signal, causes the prescaler to divide by a factor of (N&#x2212;1); otherwise, the prescaler divides by a factor of N.

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Ottawa, Canada

Tudor Lipan