Texas Instruments Corporation

Tuck Fook Toh

Chee Kiang Yew

Siu Waf Low

Kian Teng Eng

Min Yu Chan

Jing Sua Goh

Pak Hong Yee

Boon Pew Chan

Pang Hup Ong

Chew Weng Leong

A method and apparatus for producing an integrated circuit package ( ) comprising a substrate ( ) having an opening ( ) and first and second surfaces ( ), a plurality of routing strips ( ) being integral with the substrate ( ) and extending into the opening ( ), a plurality of pads ( ) disposed on the first and second surfaces ( ) are electrically connected with at least one of the routing strips ( ), wire bonding ( ) electrically connecting at least one bonding pad ( ) to at least one of the routing strips ( ) and a silicon chip ( ) attached to the printed circuit board ( ) by an adhesive material ( ) that provide a seal between silicon chip ( ) and printed circuit board ( ) is disclosed.

Method for adhering and sealing a silicon chip in an integrated circuit package

Integrated circuit package

In accordance with the present invention, there is provided an electrically insulating substrate having first and second surfaces, an outline and an opening. A plurality of electrically conductive routing strips is integral with the substrate. A plurality of contact pads is disposed on the first surface, at least one of the pads being electrically connected with at least one of the routing strips. A semiconductor chip is adhered to the second surface of the substrate. The chip has an outline that is substantially the same as the outline of the substrate. The chip has at least one bonding pad. Wire bonding electrically connects the bonding pad to a routing strip. At least one bus bar is integral with the substrate. The bus bar is positioned remote from the substrate opening and is electrically connected to a bonding pad of the chip and to a contact pad disposed on the first surface of the substrate. At least one grounding pad is disposed on the first surface of the substrate, the grounding pad being electrically connected to at least one bus bar. Encapsulating material fills the opening and covers the wire bonding and the bonding pads. Solder balls are disposed on the contact pads positioned on the first surface of the substrate to enable attachment to wiring boards or other devices or applications. The overall profile of the integrated circuit package of the present invention is preferably about 0.78 mm.

Thin chip-size integrated circuit package

A method and apparatus for producing an integrated circuit package (30) comprising a substrate (70) having an opening (86) and first and second surfaces (92, 94), a plurality of routing strips (82) being integral with the substrate (70) and extending into the opening (86), a plurality of pads (100) disposed on the first and second surfaces (92, 94) are electrically connected with at least one of the routing strips (82), wire bonding (80) electrically connecting at least one bonding pad (120) to at least one of the routing strips (82) and a silicon chip (50) attached to the printed circuit board (70) by an adhesive material (60) that provide a seal between silicon chip (50) and printed circuit board (70) is disclosed.

Method for adhering and sealing a silicon chip in an integrated circuit

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Singapore, Singapore

Tuck Fook Toh