Harris Semiconductor Patents Inc.

Tuan H Bui

Steven A Steckler

A hybrid 2-D digital convolver in a video image processor to enhance or supress image characteristics comprises a rectangular array of delay elements of pixel duration arranged in rows and columns. A digital serial stream of data encoding pixel values of a 2-D image is coupled to successive rows of delay elements of the array in horizontal-line lengths. The pixel values are modified in a multiplier of preselected weight in series with the input of each columnar delay element in a row. An adder connected between pixel delay elements in each row combines weighted inputs and outputs from prior delay elements. The output of the last delay element of each row is combined with the row outputs of prior rows and the output of the adder following the output of the last delay element off the last row forms the processed output of the convolver. The arrangement of adders and delay elements in each row avoids cumulative adder delays and thereby improves image processing efficiency.

Two dimensional hybrid digital convolver

An adaptive digital filter can be implemented on a single Very Large Scale Integrated (VLSI) circuit silicon chip and the Least Mean Square adaptive filter algorithm can be performed by parallel processing during a single clock cycle. The adaptive filter contains dual delay lines to yield a sequence of simultaneous samples of both input and output signals. Correlations of the present error difference with previous samples of both input and output signals can then take place simultaneously in each clock cycle. The adaptive filter is modular and can be cascaded with other identical filters to form a high-order filter.

Digital filter employing parallel processing

A binary adder stage in which the two binary inputs are logically combined to produce the Exclusive-OR, the Exclusive-NOR, the NAND and the NOR functions of the two inputs. The carry-input signal is then used to control the generation of the sum output and the carry-output. When the carry-input signal has one binary value, the Exclusive-OR function and the AND function of the binary inputs are produced at the SUM and C.sub.OUT outputs. When the carry-input signal has the other binary value the Exclusive-NOR function and the OR function of the two binary inputs are produced at the SUM and C.sub.OUT outputs.

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Tuan H Bui