Renesas Electronics Corporation

Renesas Technology Corp.

Tsuyoshi Yaguchi

Hisashi Shiota

Satoshi Nakamura

Shigezumi Matsui

Motoo Suwa

Takashi Sato

Kazuyuki Sakata

Ryoichi Sano

Kenzo Kuwabara

A memory interface circuit is connectable to a DDR-SDRAM which outputs read data in synchronization with a data strobe signal together with the data strobe signal. A clock generator generates internal clock signals and memory clock signals supplied to the DDR-SDRAM. The memory interface circuit determines a delay of arrival of the data strobe signal relative to the corresponding internal clock signal by using a data strobe signal inputted in a read cycle with respect to the DDR-SDRAM, samples the arrived read data, based on a signal obtained by shifting the phase of the arrived data strobe signal, and synchronizes the sampled read data to the corresponding internal clock signal on the basis of the result of determination of the arrival delay.

Semiconductor integrated circuit

Growing community of inventors

Kodaira, Japan

Tsuyoshi Yaguchi