Shinko Electric Industries Co., Ltd.

Tsuyoshi Kobayashi

Tetsuya Koyama

Takaharu Yamano

Hideaki Sakaguchi

Tadashi Arai

Toshio Kobayashi

Yuji Kunimoto

Koichi Tanaka

Kiyoaki Iida

Hajime Iizuka

Tomoaki Mashima

Takashi Yanagisawa

Yoshihiro Ihara

Tsuyoshi Shibamoto

Mitsutoshi Higashi

Kei Murayama

Michio Horiuchi

Yoshihiro Machida

Shigetsugu Muramatsu

Hiroyuki Kato

Yasuyuki Kimura

Hiroko Koike

Yukio Shimizu

Yoshio Furuhata

Toshiyuki Okabe

Takeo Kanazawa

Misa Saitoh

Kentaro Kaneko

Yasue Tokutake

Takashi Kurihara

Shinichi Wakabayashi

Kazunari Sekigawa

Shoji Watanabe

Takuya Kazama

Akira Fujisawa

Shigeri Nakamura

A lead frame includes an outer frame. The outer frame includes: one surface; another surface that is opposite to the one surface; a side surface between the one surface and the other surface; a recess that is formed to extend from the one surface to the side surface; and a notch step portion that is formed to extend from the other surface to the side surface.

Lead frame

An electronic part embedded substrate is disclosed. The electronic part embedded substrate includes a first substrate, a second substrate, an electronic part, an electrically connecting member, and a sealing member. A method of producing an electronic part embedded substrate is also disclosed. The method includes mounting an electronic part onto a first substrate, laminating a second substrate on the first substrate through an electrically connecting member; and filling a space between the first substrate and the second substrate with a sealing member to seal the electronic part.

Electronic part embedded substrate and method of producing an electronic part embedded substrate

Chip embedded substrate and method of producing the same

A package for mounting a light emitting element includes a housing and a flat plate-shaped electrode. The electrode is exposed from a lower surface of the housing. An upper surface of the electrode includes a mounting area on which the light emitting element is mounted. An insulator is arranged on the upper surface of the electrode. An element connector is connected to the insulator. A tubular reflective portion extends from the element connector to a height corresponding to the upper surface of the housing. A terminal is arranged on the side surface of the housing and connected to the reflective portion. A recess accommodates the light emitting element. The recess is formed in an upper portion of the housing, and the recess is formed by the upper surface of the electrode, the element connector, and the reflective portion.

Package for mounting a light emitting element including a flat plate-shaped electrode and method for manufacture

A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.

A substrate includes a first lead frame, a second lead frame, and a resin layer. The first lead frame includes a heat sink and a plurality of electrodes for external connection. The second lead frame is laminated on the first lead frame and includes a plurality of wirings for mounting light emitting elements. The resin layer is filled between the first lead frame and the second lead frame. The plurality of wirings are arranged above the heat sink. The plurality of electrodes and part of the plurality of wirings are joined with each other.

Substrate, light emitting device and method for manufacturing substrate

An electronic component (chip) mounted structure includes a chip having a terminal, a wiring board having a terminal electrically connected to the terminal of the chip, and an interposing board disposed between the chip and the wiring board and having a structure including an insulating base material provided with a large number of filamentous conductors penetrating the insulating base material in a thickness direction thereof. The terminal of the chip is electrically connected to the terminal of the wiring board via a plurality of filamentous conductors provided in the interposing board.

Electronic component mounted structure

In a stacked layer type semiconductor package constructed by stacking a plurality of packages with each other, the plurality of packages include a semiconductor package including: a semiconductor chip; a substrate in which a concave portion has been formed, the semiconductor chip being mounted in the concave portion; and a wiring line structure constructed in such a manner that the wiring line structure can be externally connected to the semiconductor chip at least just above and just under the semiconductor chip.

Semiconductor package and stacked layer type semiconductor package

An inductor includes a core substrate including minute column-like electrical conductors extending between a front surface and a back surface of the core substrate. Each column-like electrical conductor is insulated from adjacent column-like electrical conductors by being surrounded by an insulating material. Insulation layers are formed on the front surface and the back surface of the core substrate, respectively. At least two connection electrical conductors extend through each of the insulation layers. Each connection electrical conductor is electrically connected to a plurality of the column-like electrical conductors. Wirings are formed on each of the insulation layers to connect said connection electrical conductors to each other electrically. The wirings, the connection electrical conductors and the column-like electrical conductors are connected to form a coil in a three-dimensional manner.

Inductor and manufacturing method thereof

In a semiconductor apparatus, a semiconductor element is mounted on a wiring substrate. Wiring patterns and protrusions are formed on a surface of a substrate with the wiring patterns extending on tops of the protrusions. The surface of the substrate on which the wiring patterns are formed are covered with an insulating layer. Surfaces of connection parts of the wiring patterns formed on the tops of the protrusions are formed with the surfaces of the connection parts exposed to a surface of the insulating layer on a level with the surface of the insulating layer or in a position lower than the surface of the insulating layer. The connection parts are formed as pads for connection formed in alignment with connection electrodes of the semiconductor element. The semiconductor element is mounted by making electrical connection to the connection parts by flip chip bonding.

Wiring substrate and manufacturing method thereof, and semiconductor apparatus

First, a unilayer wiring board is fabricated, which has wiring layers formed in desired shapes on both sides of an insulating base member; and a metal bump formed on the wiring layer on one side of the insulating base member. Then, a desired number of unilayer boards are prepared and stacked up. On that case, the board disposed in the uppermost layer is prepared without having a metal bump. The boards are positioned and stacked up in such a manner that a metal bump of one of adjacent boards is connected to a corresponding wiring layer of the other board. Thereafter, resin is filled into gaps between the stacked boards, and insulating layers are formed on both sides of a multilayer board obtained through the above steps, in such a manner as to cover the entire surface except pad areas defined at predetermined positions on the wiring layers.

Method of manufacturing a multilayer wiring board

A semiconductor packageis constructed of a semiconductor chip, a sealing resinfor sealing this semiconductor chip, and wiringformed inside the sealing resin. And, the wiringis constructed of pattern wiringconnected to the semiconductor chipand also formed so as to be exposed to a lower surfaceof the sealing resin, and a post partformed so as to extend in a thickness direction of the sealing resin, the post part in which one end is connected to the pattern wiringand also the other end is formed so as to be exposed to an upper surfaceof the sealing resin

Semiconductor package and manufacturing method thereof

Growing community of inventors

Nagano, Japan

Tsuyoshi Kobayashi