Renesas Electronics Corporation

Nec Electronics Corporation

Mitsubishi Gas Chemical Company, Inc.

Nec Corporation

Tsuyoshi Kida

Kenji Sakata

Yoshihiro Ono

Takenori Takiguchi

Kohei Higashiguchi

Kentaro Mori

Masashi Okaniwa

Shinji Watanabe

Yusuke Yamada

Shuuichi Kariyazaki

Toshihiko Ochiai

Ryuichi Oikawa

Yuji Kayashima

Takamitsu Noda

Shinji Baba

Kentaro Takano

Daisuke Ejima

Nobuhiro Kinoshita

Jumpei Konno

Kenji Oyachi

Genki Sugiyama

Takahito Sekido

A film containing: a propenyl group-containing resin (A) including, at an end of a molecule, a constituent unit represented by the following formula (1); a radical polymerizable resin or compound (B) other than the propenyl group-containing resin (A); and a curing accelerator (C), wherein the radical polymerizable resin or compound (B) includes at least one selected from the group consisting of a maleimide group and a citraconimide group. In the formula (1), —* represents a bonding hand.

Film, laminate, semiconductor wafer with film layer, substrate for mounting semiconductor with film layer, and semiconductor device

A resin composition that has excellent flux activity, flexibility and storage stability and that is suitable for a pre-applied underfill material is provided. The resin composition contains a compound (A) having a phenolic hydroxy group, a metal ion trapping agent (B) and a radical polymerizable compound (C).

Resin composition, laminate, semiconductor wafer with resin composition layer, substrate for mounting semiconductor with resin composition layer and semiconductor device

A resin composition that has both excellent flux activity and high insulation reliability, that possesses good storage stability, and that further has flexibility with good operability upon being used as a laminate is provided. The resin composition contains a chelating flux agent (A), a thermal radical polymerization initiator (B) and a radical polymerizable compound (C).

The present invention provides a resin composition containing a maleimide compound (A), and at least one selected from the group consisting of an organic compound (B) having an acidic site and an organic compound (C) having an acid anhydride site.

Resin composition, laminate, semiconductor wafer with resin composition layer, substrate for mounting semiconductor with resin composition layer, and semiconductor device

The present invention provides a resin composition for an underfill material, comprising a maleimide compound (A) and a secondary monoamino compound (B), wherein the secondary monoamino compound (B) has a boiling point of 120&#xb0; C. or more.

Resin composition, laminate including the resin composition, semiconductor wafer with resin composition layer, substrate for mounting semiconductor with resin composition layer, and semiconductor device including the semiconductor wafer with resin composition layer

A semiconductor device includes first and second semiconductor components mounted on an interposer mounted on a wiring substrate, and electrically connected to each other via the interposer. Also, a plurality of wiring layers of the interposer include first, second and third wiring layers which are stacked in order from a main surface side to be a reference. In addition, in a first region of the interposer sandwiched between the first semiconductor component and the second semiconductor component, a ratio of a reference potential wiring in the third wiring layer is higher than a ratio of a reference potential wiring in the first wiring layer. Further, in the first region, a ratio of a signal wiring in the first wiring layer is higher than a ratio of a signal wiring in the third wiring layer.

Semiconductor device

A manufacturing method of a semiconductor device includes preparing a wiring substrate including a first surface, a plurality of first terminals formed on the first surface, and a second surface opposite to the first surface, arranging a first adhesive on the first surface of the wiring substrate, and after the arranging of the first adhesive, mounting a first semiconductor chip, which includes a first front surface, a plurality of first front electrodes formed on the first front surface, a first rear surface opposite to the first front surface, a plurality of first rear electrodes formed on the first rear surface, and a plurality of through electrodes electrically connecting the plurality of first front electrodes to the plurality of first rear electrodes, on the first surface of the wiring substrate via the first adhesive.

Semiconductor device and manufacturing method thereof

In a semiconductor device according to an embodiment, a second semiconductor chip is mounted on a first rear surface of a first semiconductor chip. Also, the first rear surface of the first semiconductor chip includes a first region in which a plurality of first rear electrodes electrically connected to the second semiconductor chip via a protrusion electrode are formed and a second region which is located on a peripheral side relative to the first region and in which a first metal pattern is formed. In addition, a protrusion height of the first metal pattern with respect to the first rear surface is smaller than a protrusion height of each of the plurality of first rear electrodes with respect to the first rear surface.

A method for manufacturing a semiconductor device includes the steps of mounting a Si interposer over a printed wiring substrate, plasma-cleaning an upper surface of the Si interposer, disposing an NCF over the upper surface of the Si interposer, and mounting a semiconductor chip over the upper surface of the Si interposer through the NCF. Also, the method includes the step of electrically coupling each of plural electrodes of a second substrate and each of plural electrode pads of the semiconductor chip with each other through plural bump electrodes by reflow, and the surface of the Si interposer is plasma-cleaned before attaching the NCF to the Si interposer.

Method for manufacturing semiconductor device

The reliability of a semiconductor device is improved. A probe mark is formed on a probe region of a pad covered with a protective insulating film. And, a pillar-shaped electrode has a first portion formed on an opening region and a second portion that is extended over the probe region from the upper portion of the opening region. At this time, a center position of the opening region is shifted from a center position of the pillar-shaped electrode that is opposed to a bonding finger.

Chip having a pillar electrode offset from the bonding pad

A semiconductor chip and a wiring board are coupled to each other through conductor posts. The centers of conductor posts situated above openings at the outermost periphery shift from the centers of the openings in a direction away from the center of the semiconductor chip. When a region where each of the conductor posts and an insulating layer are overlapped with each other is designated as an overlapped region, the width of the overlapped region more on the inner side than the opening is smaller than the width of the overlapped region more on the outer side than the opening. Thus, while stress applied to the conductor posts is relaxed, coupling reliability between the semiconductor chip and the wiring board is retained.

A semiconductor device includes a substrate, a semiconductor chip that is bonded to one of the faces of the substrate via bumps, and has a device formation face facing the one of the faces, and a resin that fills the space between the device formation face of the semiconductor chip and the one of the faces of the substrate. The resin includes: a first resin that is formed in a formation region of bumps placed on the outermost circumference of the bumps, and is formed inside the formation region, and a second resin that is formed outside the first resin. The thermal expansion coefficient of the substrate is higher than the thermal expansion coefficient of the first resin. The thermal expansion coefficient of the second resin is higher than the thermal expansion coefficient of the first resin.

Semiconductor device and method for manufacturing the same

A method of manufacturing a semiconductor device, includes mounting a semiconductor chip on a wiring substrate such that one surface of the semiconductor chip is faced to one surface of the wiring substrate, and filling a first resin in a gap between the surface of the wiring substrate and the surface of the semiconductor chip such that part of the first resin protrudes from the gap. In the filling of the first resin, the first resin is injected into the gap by use of a first resin injection nozzle while the first resin injection nozzle is being moved along any one of sides of the semiconductor chip or along two sides of the semiconductor chip which are adjacent to each other.

Semiconductor device and method of manufacturing the same

The extent of a bow of a semiconductor device is suppressed in a case where the fillet width of an underfill resin is asymmetrical. The center positionof a chipis caused to deviate from the center positionof a wiring substratein a direction (the direction of the arrow B) reverse to the deviation direction (the direction of the arrow A) of the center positionof an underfill resinfrom the center positionof the chip. The center positionof a resin for encapsulationis caused to deviate from the center positionof the wiring substratein the same direction (the direction of the arrow A) as the deviation direction (the direction of the arrow A) of the center positionof the underfill resinfrom the center positionof the chip

Growing community of inventors

Kanagawa, Japan

Tsuyoshi Kida