Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Renesas Technology Corp.

Tsuyoshi Hamatani

Hiroaki Fujimoto

Toru Nomura

Yuichiro Yamada

Masaki Utsumi

Takeshi Morikawa

Masashi Funakoshi

Yukio Nakabayashi

Masazumi Matsuura

Susumu Matsumoto

Hiroshi Horibe

Kazumi Watase

Tadaaki Mimura

Yukitoshi Ota

Kenji Ueda

Atuhito Mizutani

A seal ring is continuously formed along a boundary between a semiconductor element region and a scribe grid region, auxiliary parts are intermittently arranged along the seal ring, and the seal ring is constituted by a metal layer.

Semiconductor device

A conductive region electrically connected to a buffer coat film is formed on at least one corner of a semiconductor substrate, so that electricity charged on a package seal resin or a surface of the buffer coat film is allowed to flow toward the conductive region through a conductive path. Thus, density of the electricity charged on the package seal resin or the surface of the buffer coat film is lowered, and electric discharge can be suppressed. Since the electric discharge is suppressed, no high voltage is applied to an external input/output terminal. As a result, it is possible to prevent a circuit metal wire connected to an integrated circuit from being fused and an interlayer insulating film from being damaged.

Semiconductor device and method of manufacturing the same

A pad section serving as an electrode for external connection of a semiconductor device includes a first pad metal () formed in the top layer, a second pad metal () formed under the first pad metal () via an interlayer insulating film (), and vias () which penetrate the interlayer insulating film () and electrically connect the first pad metal () and the second pad metal (). The first pad metal () and the second pad metal () have edges displaced from each other so as not to be aligned with each other along the thickness direction of each layer. Thus, it is possible to reduce stress occurring on an edge of the second pad metal (), thereby reducing damage on the interlayer insulating film () and so on.

Electrode pad section for external connection

Disclosed is a semiconductor device which comprises a semiconductor element having a plurality of electrodes, a plurality of external electrodes disposed around the periphery of the semiconductor element, a fine wire electrically connected between at least one of surfaces of each of the plural external electrodes and at least one of the plural electrodes of the semiconductor element, and an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped, wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrode are exposed from a bottom surface of the encapsulating resin and a top surface of the semiconductor element and a top surface of each of the plural external electrode are located substantially coplanar with each other.

Semiconductor device and method for the fabrication thereof including grinding a major portion of the frame

A semiconductor device includes: multiple kinds of interlayer insulating films formed on a semiconductor substrate and having different elastic moduli, respectively; a metal pad arranged on said multiple kinds of interlayer insulating films; the interlayer insulating film of a low elastic modulus having the lowest elastic modulus and having an opening located under the metal pad, the interlayer insulating film of a not-low elastic modulus having the elastic modulus larger than the elastic modulus of the interlayer insulating film of the low elastic modulus, being layered in contact with the interlayer insulating film of the low elastic modulus, and continuously extending over the opening and a region surrounding the opening and a metal interconnection layer arranged under the metal pad, filling the opening in the interlayer insulating film of the low elastic modulus, and being in contact with the interlayer insulating film of the not-low elastic modulus.

Semiconductor device which employs an interlayer insulating film of a low mechanical strength and a highly reliable metal pad, and a method of manufacturing the same

Semiconductor device and method for the fabrication thereof grinding frame portion such that plural electrode constituent portions

A semiconductor chip which does not increase the thickness or the board area of a semiconductor device wherein semiconductor chips are layered and does not increase the wire length between the semiconductor chips even in the case that a plurality of semiconductor chips are layered on a wiring board and a process thereof, as well as a semiconductor device, and the like, are provided. The semiconductor chip has a semiconductor substrate, first external electrodesformed on the first surfaceof the semiconductor substrate, second external electrodesformed on the second surfaceof the semiconductor substrateand through holescreated in the semiconductor substrate, wherein the through holesare provided in the inclined planesformed so that the inner angles made up of the second surfaceand the inclined planesare obtuse angles and the first external electrodesand the second external electrodesare electrically connected through conductive patternsformed so as to follow the inner walls of the through holesand the inclined planes

Semiconductor chip, wiring board and manufacturing process thereof as well as semiconductor device

A lead frame includes: an outer frame section; a plurality of chip mounting sections which are supported by the outer frame section and on which a plurality of semiconductor chips are mounted; lead sections surrounding the chip mounting sections; connecting sections for connecting and supporting the lead sections and the outer frame section with each other; and an encapsulation region in which the chip mounting sections are encapsulated together in an encapsulation resin. An opening is provided in a plurality of regions of the outer frame section that are each located outside the encapsulation region and along the extension of one of the connecting sections.

Lead frame and method for fabricating resin-encapsulated semiconductor device using the same

Semiconductor device and method for the fabrication thereof

Growing community of inventors

Shiga, Japan

Tsuyoshi Hamatani