Kabushiki Kaisha Toshiba

Toshiba Memory Corporation

Tsutomu Unesaki

Atsushi Kunimatsu

Tsutomu Owa

Masaki Miyagawa

Hiroyuki Sakamoto

Kenichi Maeda

Hiroto Nakai

Kenta Yasufuku

Hiroshi Nozue

Mari Takada

Reina Nishino

Goh Uemura

Kazuhiro Kawagome

Yoshiyuki Endo

A memory management device of an example of the invention controls writing into and reading from a main memory including a nonvolatile semiconductor memory and a volatile semiconductor memory in response to a writing request and a reading request from a processor. The memory management device includes a coloring information storage unit that stores coloring information generated based on a data characteristic of write target data to be written into at least one of the nonvolatile semiconductor memory and the volatile semiconductor memory, and a writing management unit that references the coloring information to determines a region into which the write target data is written from the nonvolatile semiconductor memory and the volatile semiconductor memory.

Memory management device predicting an erase count

According to one embodiment, a memory management device includes a history management unit, an address translation table, an address management unit, and a data management unit. The history management unit manages an access history for data stored in a nonvolatile semiconductor memory. The address translation table includes a translation table of a logical address and a physical address corresponding to the data. The address management unit specifies, based on the access history, second data to be accessed after access to first data being stored in the nonvolatile semiconductor memory, and registers a second physical address corresponding to the second data in the address translation table in association with a first logical address corresponding to the first data. The data management unit reads out the second data from the nonvolatile semiconductor memory to a buffer.

Memory management device and method for managing access to a nonvolatile semiconductor memory

According to one embodiment, an information processing device includes a first determination section and a setting section. The first determination section determines inconsistency between first data and second data. The first data is stored in a nonvolatile semiconductor memory. The second data is corresponding to the first data and stored in a semiconductor memory. The setting section sets execution timing of write back based on access frequency information associated with the second data.

Variable write back timing to nonvolatile semiconductor memory

Growing community of inventors

Hachioji, Japan

Tsutomu Unesaki