Hitachi, Ltd.

Hitachi Video and Information System, Inc.

Hitachi Computer Electronics Co., Ltd.

Tsutomu Takagi

Hitoshi Abe

Katsutoshi Tajima

Naozane Yoshida

Nobuhiro Washiya

Kanji Masuyama

Kiyotaka Doi

Tamotsu Hirota

An apparatus for adding isopleths to image data includes an input device for sequentially inputting image data to be displayed on an image screen of a display device, a horizontal delay circuit for delaying the inputted data by one horizontal scanning period, a column comparator for comparing the inputted data, that is, a sample, with a delayed sample from the horizontal delay circuit to thereby generate a signal indicating a sample to be converted into isopleth data, a sample delay circuit for delaying the sample outputted from the horizontal delay circuit by one sampling period, a row comparator for comparing the sample outputted from the horizontal delay circuit with the sample outputted from the sample delay circuit to thereby generate a signal indicating a sample to be converted into isopleth data, and an isoplete data generator responsive to the output of the column and row comparators for replacing the indicated input sample by predetermined distinguishable data and for outputting the predetermined distinguishable data to the display device.

Isopleth generator for applying isopleths to digital picture data and

A method of controlling an image memory system wherein non-interlace image data is written into the odd field and the even field memories, and the contents written into the odd field and even field memories are respectively read out so as to be converted into interlace image data. Each line of the non-interlace image data is alternately written into the odd field and even field memories in units of a plurality of dots. If the plurality of dots include dots for the odd field and dots for the even field, the image data of the plurality of dots are simultaneously written into both the odd field memory and the even field memory. When reading the image data out from the odd field memory, the image data for the even field written into the odd field memory is invalidated. Similarly, when reading the image data out from the even field memory, the image data for the odd field written into the even field memory is invalidated. With this structure, writing/reading operation to the image memory can be performed at high speed without error even when the total number of dots on one line are not divisible by the number of dots to be written into the memories in parallel. Further, it is not necessary to change the output specification of the output device which outputs the image data, such as a computer.

Method of controlling image memory system for non-interlace/interlace

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Fujisawa, Japan

Tsutomu Takagi