Kabushiki Kaisha Toshiba

Tsutomu Sugawara

Masanori Furuta

Daisuke Kurose

Shoji Otaka

Masahiro Hosoya

Takafumi Yamaji

Koji Ogura

Takashi Wakutsu

Mutsumu Serizawa

Yasuhiko Tanabe

Yoshinari Kumaki

Eiji Kamagata

Nobuyasu Nakajima

Hiroki Sakurai

Katsuya Nounin

Osamu Moriya

Mai Nozawa

A radio apparatus includes a first receiver that is a processing unit for amplifying and frequency converting a radio signal received via an antenna, thereby outputting an IF signal; a detector unit for detecting a preamble signal from the IF signal; a second receiver for amplifying and quadrature demodulating the radio signal, thereby generating an I-signal and a Q-signal; a demodulator unit for demodulating the I-signal and Q-signal to generate a data signal; and a control unit for halting the operation of the first receiver and further activating the second receiver when the detector unit detects the preamble signal and for activating the first receiver and halting the operation of the second receiver when the demodulator unit completes the demodulation of the I-signal and Q-signal.

Radio apparatus

A radio apparatus includes an antenna; an amplifier that amplifies a radio signal, received via the antenna; a first mixer that frequency converts the amplified radio signal to generate a first analog signal; a first A/D converter that converts the first analog signal to generate a first digital signal; a second mixer that frequency converts the amplified signal to generate a second analog signal; a second A/D converter means that converts the second analog signal to generate a second digital signal; a demodulator means that demodulates the first and second digital signals to generate a demodulated signal; a detector that detects a preamble from the first digital signal; and a control means that halts the second mixer and second A/D converter during the wait for the radio signal and that activates the second mixer and second A/D converter when the detector detects the preamble.

A magnetic storage device includes a plurality of MRAM memory cells connected to a data transfer line, a clamp transistor connected between the data transfer line and a reading signal line and configured to fixedly hold the potential of the data transfer line, and a reading circuit which is connected to the reading signal line and which reads the storage information of the memory cell. The reading circuit includes a hold switch connected between the reading signal line and a reading node N and configured to hold the potential of the node N, a capacitor connected between the node N and a ground end, a precharging switch connected between the node N and a power source and configured to charge the capacitor, and an inverter to which the potential of the node N is input to generate a digital signal.

Magnetic storage device

In a read circuit, a write circuit writes a data to be stored and/or a test data to the memory cell. A control circuit controls the write circuit to write the test data to the memory cell in a first phase, and to write the test data which is same as the first phase to the memory cell in a second phase. An integrator integrates voltages at one terminal of the memory cell during the first phase to obtain a first integrated voltage, and integrates voltages at one terminal of the memory cell during the second phase to obtain a second integrated voltage. A buffer stores the first integrated voltage. A comparator compares the first integrated voltage from the buffer with the second integrated voltage from the integrator to obtain the data.

Read circuit and read method

A magnetic memory device including a plurality of word lines, a plurality of bit lines which intersect the word lines and are put into groups, a plurality of memory cells which are arranged at intersections between the bit lines and the word lines, each memory cell including a magnetic element and a transistor which are connected in series, a first decoder which sequentially selects the word lines, a second decoder which sequentially drives the bit lines of each group, a weighting adder which performs weighting addition of currents flowing on bit lines in a selected group to generate an added current signal, a current/voltage converter which converts the added current signal into a voltage signal, and an analog-to-digital converter which digitizes the voltage signal.

Magnetic memory device

A magnetic memory device includes a plurality of word lines, a plurality of bit lines arranged to intersect with the word lines, an MRAM cell array including a plurality of magnetic random access memory (MRAM) cells arranged at intersection portions between the word lines and the bit lines, a read current source which supplies a read current to the MRAM cells in a read mode, a sense amplifier which detects terminal voltages of the MRAM cells generated by the read current to generate a detection output signal, a latch circuit which latches the detection output signal to output read data, and a data write circuit which supplies a write current to the MRAM cells depending on write data in a write mode to perform writing and which supplies the write current to the MRAM cells depending on the read data in the read mode to perform rewriting.

In a radio communication system, communication for sending data from a transmitting station to a receiving station and communication for transmitting re-send data from the transmitting station to the receiving station according to the re-send request transmitted from the receiving station to the transmitting station are done on different occasions of communication. Hence, in the applications not requiring real time service, this re-send control method does not spend the power and radio resources wastefully, and by effectively utilizing the system resources and lowering the power consumption, the battery of the terminal may be reduced in size, so that the portability of the terminal may be enhanced. Further, the radio communication system has a high speed down-link channel and a low speed down-link channel, data to be transmitted from a base station to a terminal is classified into primary data and secondary data, the primary data is transmitted by the high speed down-link channel, and the secondary data is transmitted by the low speed down-link channel.

Radio communication system having re-send control method

A portable terminal includes a first store for storing a first physical address including a serial number of the terminal, a second store for storing a first logical address including a subscriber's telephone number, a third store for storing a second physical address of a hardware used for computer communication, a fourth store for storing a second logical address corresponding to the second physical address, an interface for radio LAN, and an interface for PHS system. When a call is originated, a first channel is connected by using the first physical address and the first logical address. The second physical address and the second logical address are transmitted to the network from the call originator's terminal through the first channel, thereby setting in a state enabling communication between computers, and necessary data is transmitted to the call originator's terminal through a second channel by communication between computers.

Radio communication system selectable low speed bi-directional

In a phase detector, an input signal (Si) is multiplied in a multiplier by two reference signals intersecting at right angles with each other. Signals obtained by multiplication are passed through filters and subjected to quadrature demodulation. An I signal and a Q signal obtained by quadrature demodulation are input to non-linear compression circuits and compressed by logarithmic conversion. Based on the compressed I and Q signals, a phase detection circuit detects the phase of the input signal (Si).

Growing community of inventors

Kawasaki, Japan

Tsutomu Sugawara