Nippon Telegraph and Telephone Corporation

Tsutomu Kamoto

Masao Suzuki

Tadao Nakagawa

Tsuneo Tsukahara

A fractional-N frequency divider system generates an output signal having frequency of an input signal divided by a desired frequency division ratio (N+A/M) in which N is an integer and A/M is a fraction, A.ltoreq.M, and includes a programmable frequency divider receiving input frequency and providing divided frequency in which division ratio (N, N+1) is an integer and is externally supplied, a selector supplying one of the externally supplied integers (N, N+1) to the divider according to a selection signal, and a fractional part set having a first counter initialized to count M, a second counter initialized to count A, and a logic circuit for supplying the selection signal according to the counters. The counters are decremented by an output of the divider and reach zero when they receive M and A number of pulses, respectively. The second counter stops counting operation when it reaches zero. The logic circuit makes the selector select an integer N in a condition when content of the first counter is not zero and content of the second counter is zero, and N+1 in other conditions, so that the division ratio in the divider is N+1 for A number of output pulses of the divider among M number of output pulses, and is N for M-A number of the output pulses.

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Kanagawa, Japan

Tsutomu Kamoto