Elpida Memory, Inc.

Nec Corporation

Ihi Corporation

Elipida Memory, Inc.

Tsutomu Hayakawa

Shinpei Iijima

Natsuki Sato

Akira Hoshino

Kanta Saino

Katsumi Takahashi

Shinichi Horiba

Takao Kurata

An OH radical measurement device includes a contact unit configured to bring an OH radical detection probe into contact with a gas to be measured, the OH radical detection probe including an aromatic carboxylic acid or an aromatic carboxylic acid derivative, a polar aprotic organic solvent, and a polar protic organic solvent having a content higher than a content of the polar aprotic organic solvent.

OH radical measuring device and OH radical measuring method

A semiconductor memory device comprises a heater electrode, a phase change portion, a heat insulation portion and an upper electrode. The phase change portion comprises a concave portion and a contact portion. The concave portion is in contact with the heater electrode. The contact portion is formed integrally with the concave portion. The heat insulation portion is formed in the concave portion. The upper electrode is formed on the contact portion and the heat insulation portion so that the heat insulation portion is positioned between the concave portion and the upper electrode.

Semiconductor memory device and fabrication method thereof

A phase-change memory device has a different-material contact plug having a first electrically conductive material plug made of a first electrically conductive material, and a second electrically conductive material plug made of a second electrically conductive material having a specific resistance smaller than the first electrically conductive material, the first electrically conductive material plug and the second electrically conductive material plug being buried in a common contact hole. The different-material contact plug is effective for reducing the radiation of heat from a contact plug beneath a phase-change layer. The phase-change memory device also includes an extension electrode layer held in contact with a portion of the bottom surface of the phase-change layer in an area displaced off a position directly above a contact surface through which the phase-change layer and the heater electrode contact each other. The extension electrode layer reduces the radiation of heat from an electrode above the phase-change layer.

Phase-change memory device with minimized reduction in thermal efficiency and method of manufacturing the same

The invention provides a novel structure of a phase change memory device. In the phase change memory device of the invention, an electrode acting as a radiating fin does not exit immediately above a phase change area of a phase change layer (). A heater electrode () and landing electrode layer () both contact the bottom of the phase change layer () made of GST. The landing electrode layer () contacts the bottom of the phase change layer () to partially overlap in a region off from a portion immediately above the contact face (Y) of the phase change layer and heater electrode. The contact electrode () is directly connected to the landing electrode layer () in a portion off from a portion immediately above the heater electrode (). The phase change layer of GST or the like does not exist immediately below the contact electrode.

Phase change memory device and method of manufacturing the device

A semiconductor memory device comprises a heater electrode, a phase change portion, and an upper electrode. The phase change portion is connected to the heater electrode in a first direction. The upper electrode has an upper surface, a lower surface and a hole. The hole pierces the upper electrode between the upper and the lower surfaces in the first direction. The hole has an inner wall, which is connected to the phase change portion in a second direction perpendicular to the first direction.

A phase change memory includes a sidewall insulation film and a heater electrode which are formed in a contact hole formed in an interlayer insulation film on a lower electrode. The heater electrode has a recessed structure. In a recessed area surrounded by the sidewall insulation film, the heater electrode and a phase change film are contacted with each other. A phase change region is formed only in an area contacted with the sidewall insulation film. The sidewall insulation film is an anti-oxidizing insulation film. The phase change region and the heater electrode which are heated to a high temperature upon rewriting are not contacted with the interlayer insulation film as an oxidizing insulation film.

Semiconductor device and method of producing the same

A composite plugis formed, and both a first plug (TiN)and a second plug (W)are disposed in one contact hole; the first plug (TiN)functions as a heater electrode and the second plug (W)functions as a contact plug. This eliminates the need to stack the heater electrode on the contact plug. The resistivities Rand Rof the first and second plugs of the composite plugare in a relationship R&#x3e;R

Phase change memory device and method for manufacturing phase change memory device

A phase-change memory device has a phase-change layer, a heater electrode having an end held in contact with the phase-change layer, a contact plug of different kinds of material having a first electrically conductive material plug made of a first electrically conductive material and held in contact with the other end of the heater electrode, and a second electrically conductive material plug made of a second electrically conductive material having a specific resistance smaller than the first electrically conductive material, the first electrically conductive material plug and the second electrically conductive material plug being stacked in one contact hole, the heater electrode and the second electrically conductive material plug being held in contact with each other in overlapping relation to each other, and an electrically conductive layer electrically connected to the second electrically conductive material plug.

Phase-change memory device and method of manufacturing same

A phase-change memory device has a phase-change layer, a heater electrode having an end held in contact with the phase-change layer, a contact plug of different kinds of material having a first electrically conductive material plug made of a first electrically conductive material and held in contact with the other end of the heater electrode, and a second electrically conductive material plug made of a second electrically conductive material having a specific resistance smaller than the first electrically conductive material, the first electrically conductive material plug and the second electrically conductive material plug being held in contact with each other through at least respective side surfaces thereof, the heater electrode and the second electrically conductive material plug being not in overlapping relation to each other, and an electrically conductive layer electrically connected to the second electrically conductive material plug.

There is provided a method of fabricating a gate electrode, including the steps of (a) forming a gate oxide film at a surface of a semiconductor substrate, (b) forming a multi-layered structure on the gate oxide film, the multi-layered structure including a polysilicon layer formed on the gate oxide film, a refractive metal silicide layer formed on the polysilicon layer, and a silicon nitride layer formed on the refractive metal silicide layer, (c) thermally annealing the multi-layered structure in a nitrogen atmosphere to thereby form a silicon nitride film on sidewalls of the polysilicon layer and the refractive metal silicide layer, and (d) oxidizing the semiconductor substrate and the multi-layered structure.

Gate electrode and method of fabricating the same

A method for manufacturing a DRAM includes the steps of forming a gate oxide film, a polysilicon film and a tungsten silicide film consecutively on a silicon substrate, selective etching the tungsten silicide film, covering exposed side surfaces of the tungsten silicide film by a polysilicon side-wall film, selectively etching the polysilicon film, oxidizing the polysilicon side-wall film and exposed surfaces of the polysilicon film, and forming a gate electrode including the polysilicon film and the tungsten silicide film. The resultant DRAM has lower leakage current and excellent refresh characteristics due to less contamination of diffused regions by the tungsten particles.

Method for manufacturing a semiconductor device having a layered gate electrode

A semiconductor device of the present invention has a base step area based on the step of a stacked capacitor array and has wiring layers formed over the stacked capacitors. A wiring layer arranged at the far most end part of the base step area is formed to detour the step area and the other wiring layers are arranged on the base step area.

Semiconductor device having wiring detour around step

A method of fabricating a semiconductor device having a semiconductor substrate, a chip region and a scribe region, includes a step of forming a first hole in an insulating film on the chip region by using a step-and-repeat lithography system using a half-tone phase shift mask, and forming a conductive film on an entire surface of the semiconductor substrate. The conductive film is patterned such that the conductive film remains at least at a second hole and its peripheral portion, the second hole resulting in being formed at a four-fold exposure portion which is a portion where a plurality of shots have overlapped at the scribe region during the step of forming the first hole. Since the conductive film remains at the second hole and its peripheral portion, it is possible to prevent the formation of residue of the conductive film at sidewalls of the second hole when the conductive film is etched away from the scribe region.

Method of fabricating semiconductor device using half-tone phase shift

A manufacturing method for a semiconductor device is disclosed for effecting improvement of voltage resistance between an N-well and N-type diffusion layer without adversely affecting circuit and transistor characteristics. At the time of forming an N-well, a side wall composed of nitride layer is formed on the oxide layer that is used as a mask in phosphorus implantation, and the N-well is formed using as a mask the oxide layer on which this side wall is provided. The side wall is then removed, boron is implanted, and a channel stopper is formed only between the N-well and N-type diffusion layer. A channel stopper between N-type diffusion layers is formed subsequently as a separate step. In this way, the concentration of the channel stopper between the N-well and N-type diffusion can be set to a concentration different from that of the channel stopper between N-type diffusion layers.

Growing community of inventors

Tokyo, Japan

Tsutomu Hayakawa