Unimicron Technology Corporation

Tsung-Yuan Chen

Shu-Sheng Chiang

Tzyy-Jang Tseng

Wei-Ming Cheng

Chun-Chien Chen

Shih-Lian Cheng

Yi-Chun Liu

David C H Cheng

Cheng-Po Yu

Ming-Huang Ting

Kuo-Ching Chen

Cheng-Pin Chien

A method of packaging an electrical device including following steps is provided. A circuit board including a substrate and a first conductive pattern is provided. The electrical device having an electrode is disposed on the circuit board. A dielectric layer is formed on the circuit board to cover the electrical device, the electrode and the first conductive pattern, wherein a first caving pattern is formed in the dielectric layer by the first conductive pattern. The dielectric layer is patterned to form a through hole and a second caving pattern connecting with the through hole and exposing the electrode. A conductive material is filled in the through hole and the second caving pattern to form a conductive via in the through hole and a second conductive pattern in the second caving pattern. The substrate is removed.

Method of fabricating an electrical device package structure

A manufacturing method of a circuit board is provided. A circuit substrate having a first surface and at least a first circuit is provided. A dielectric layer having a second surface and covering the first surface and the first circuit is formed on the circuit substrate. The dielectric layer is irradiated by a laser beam to form a first intaglio pattern, a second intaglio pattern and at least a blind via. A first conductive layer is formed in the first intaglio pattern, the second intaglio pattern and the blind via. A barrier layer and a second conductive layer are formed in the second intaglio pattern and the blind via. Parts of the second conductive layer, parts of the barrier layer and parts of the first conductive layer are removed until the second surface of the dielectric layer is exposed, so as to form a patterned circuit structure.

Manufacturing method of circuit board

A substrate strip with wiring is provided. The substrate strip includes a plurality of wiring blocks, a carrying substrate, and an adhesive layer. Each of the wiring blocks includes at least one wiring board unit, and each of the wiring board unit includes an insulating layer and a wiring layer disposed on the insulating layer. The carrying substrate has a carrying surface. The adhesive layer is disposed between the carrying surface and the wiring layers, and adheres to the wiring blocks and the carrying substrate. When the adhesive layer is separated from the wiring blocks, the wiring layers are kept on the insulating layers. Further, a manufacturing method for the substrate is provided.

Method of manufacturing a substrate strip with wiring

An embedded chip package structure including a core layer, a chip, a first circuit layer and a second circuit layer is provided. The core layer includes a first surface, a second surface opposite to each other and a chip container passing through the first surface and the second surface. The chip is disposed in the chip container. The chip includes an active surface and a protrusion and a top surface of the protrusion is a part of the active surface. The first circuit layer is disposed on the first surface and electrically connected to the core layer and the chip. The first circuit layer has a through hole. The protrusion of the chip is situated within the through hole, and the top surface of the protrusion is exposed to receive an external signal. The second circuit layer is disposed on the second surface and electrically connected to the core layer.

Embedded chip package structure

A fabricating process for an embedded circuit structure is provided. A through hole is formed in a core panel and penetrates the core panel. Two indent patterns are respectively formed on two opposite surfaces of the core panel. A conductive material is electroplated into the through hole and the indent patterns, so as to form a conductive channel in the through hole and two circuit patterns in the indent patterns respectively. Portions of the circuit patterns, which exceed the indent patterns respectively, are removed for planarizing the circuit patterns to be level with the two surfaces of the core panel respectively.

Fabricating process of embedded circuit structure

A circuit board structure including a dielectric layer, a fine circuit pattern and a patterned conductive layer is provided, wherein the fine circuit pattern is embedded in a surface of the dielectric layer, and the patterned conductive layer is disposed on another surface of the dielectric layer and protrudes therefrom.

Circuit board structure

A method of packaging an electrical device including following steps is provided. A circuit board including a substrate and a first conductive pattern is provided. The electrical device having an electrode is disposed on the circuit board. A dielectric layer is formed on the circuit board to cover the electrical device, the electrode and the first conductive pattern, wherein a first caving pattern is formed in the dielectric layer by the first conductive pattern. The dielectric layer is patterned to form a through hole and a second caving pattern connecting with the through hole and exposing the electrode. A conductive material is filled in the through hole and the second caving pattern to form a conductive via in the through hole and a second conductive pattern in the second caving pattern. The substrate is removed. Moreover, the electrical device package structure is also provided.

Electrical device package structure and method of fabricating the same

A process for fabricating a wiring board is provided. In the process, a wiring carrying substrate including a carry substrate and a wiring layer is formed. Next, at least one blind via is formed in the wiring carrying substrate. Next, the wiring carrying substrate is laminated to another wiring carrying substrate via an insulation layer. The insulation layer is disposed between the wiring layers of the wiring carrying substrates and full fills the blind via. Next, parts of the carry substrates are removed to expose the insulation layer in the blind via. Next, a conductive pillar connected between the wiring layers is formed. Next, the rest carry substrates are removed.

Process for fabricating wiring board

A package substrate includes a core layer, a first dielectric layer, a second circuit pattern, a first solder mask and an insulating layer. A first circuit pattern is disposed on a first surface of the core layer. The first dielectric layer covers the first circuit pattern. The second circuit pattern is located on the first dielectric layer and the second circuit pattern includes an interconnection circuit pattern within a chip mounting area. The first solder mask covers a portion of the second circuit pattern outside the chip mounting area. The insulating layer covers the chip mounting area and the interconnection circuit pattern. A plurality of embedded pads are located on an upper surface of the insulating layer.

Method for fabricating package substrate

A fabricating method of an embedded package structure includes following steps. First and second boards are combined to form an integrated panel. First and second circuit structures are respectively formed on the first and second boards that are then separated. An embedded element is electrically disposed on the first circuit structure. First and second conductive bumps are respectively formed on a conductive circuit substrate and the second circuit structure. First and second semi-cured films are provided; a laminating process is performed to laminate the first circuit structure on the first board, the first and second semi-cured films, the conductive circuit substrate, and the second circuit structure on the second board. The first and second semi-cured films encapsulate the embedded element. The first and second conductive bumps respectively pierce through the first and second semi-cured films and are electrically connected to the first circuit structure and the conductive circuit substrate, respectively.

Fabricating method of embedded package structure

An embedded structure of circuit board is provided. The embedded structure includes a substrate, a first patterned conductive layer disposed on the substrate and selectively exposing the substrate, a first dielectric layer covering the first patterned conductive layer and the substrate, a pad opening disposed in the first dielectric layer, and a via disposed in the pad opening and exposing the first patterned conductive layer, wherein the outer surface of the first dielectric layer has a substantially even surface.

Embedded structure

A package substrate includes a core board, a first dielectric layer, a second circuit pattern, a first solder mask and an insulating layer. A first circuit pattern is disposed on a first surface of the core board. The first dielectric layer covers the first circuit pattern. The second circuit pattern is located on the first dielectric layer and the second circuit pattern includes an interconnection circuit pattern within a chip mounting area. The first solder mask covers a portion of the second circuit pattern outside the chip mounting area. The insulating layer covers the chip mounting area and the interconnection circuit pattern. A plurality of embedded bump pads are located on an upper surface of the insulating layer.

Package substrate and fabrication method thereof

A fabricating method of an embedded package structure is provided. The method includes combining a first board and a second board to form an integrated panel; forming a first circuit structure on the first board and forming a second circuit structure on the second board; separating the first board from the second board; electrically disposing an embedded element on the first circuit structure; forming at least one conductive bump on the second circuit structure; and providing a semi-cured film and performing a laminating process to laminate the first circuit structure on the first board, the semi-cured film, and the second circuit structure on the second board, wherein the semi-cured film encapsulates the embedded element, and after the laminating process is performed, the at least one conductive bump pierces through the semi-cured film and is electrically connected to the first circuit structure.

A circuit board including a circuit substrate, a dielectric layer, a first conductive layer and a second conductive layer is provided. The circuit substrate has a first surface and a first circuit layer. The dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The dielectric layer has a second surface, at least a blind via extended from the second surface to the first circuit layer and an intaglio pattern. The first conductive layer is disposed inside the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via and covers the first conductive layer. The second conductive layer is electrically connected with the first circuit layer through the first conductive layer.

Process for manufacturing a circuit board

A circuit board includes a circuit substrate, a dielectric layer, and a patterned circuit structure. The dielectric layer covers a first surface and at least a first circuit of the circuit substrate. The dielectric layer has a second surface, at least a blind via extending from the second surface to the first circuit, a first intaglio pattern, and a second intaglio pattern. The patterned circuit structure includes at least a second circuit and a plurality of third circuits. The second circuit is disposed in the first intaglio pattern. The third circuits are disposed in the second intaglio pattern and the blind via. Each third circuit has a first conductive layer, a second conductive layer, and a barrier layer. The first conductive layer is located between the barrier layer and the second intaglio pattern and between the barrier layer and the blind via. The second conductive layer covers the barrier layer.

Growing community of inventors

Taoyuan County, Taiwan

Tsung-Yuan Chen