United Microelectronics Corp.

Tsung-Lung Tsai

Chien-Ting Lin

Po-Jui Liao

Shao-Hua Hsu

Chun-Hsien Lin

Chan-Lon Yang

Jiunn-Hsiung Liao

Guang-Yaw Hwang

Hung-Ling Shih

Shin-Chi Chen

Chia-Wen Liang

Yeng-Peng Wang

Teng-Chun Tsai

Yi-Wei Chen

Zhi-Cheng Lee

Che-Hua Hsu

Yi-Wen Chen

Cheng-Guo Chen

Jie-Ning Yang

Jung-Tsung Tseng

Chun-Yuan Wu

I-Ming Tseng

Chia-Lin Hsu

Hsin-Fu Huang

Wen-Han Hung

Chien-Ming Lai

Shui-Yen Lu

Pei-Yu Chou

Min-Chuan Tsai

Bang-Chiang Lan

Po-Cheng Huang

Chen-Hua Tsai

Tong-Jyun Huang

Cheng-Tzung Tsai

Ying-Tsung Chen

Shang-Yuan Tsai

Tzung-Ying Lee

Cheng-Yu Ma

Yu-Hsin Lin

A method of manufacturing a metal gate is provided. The method includes providing a substrate. Then, a gate dielectric layer is formed on the substrate. A multi-layered stack structure having a work function metal layer is formed on the gate dielectric layer. An Oambience treatment is performed on at least one layer of the multi-layered stack structure. A conductive layer is formed on the multi-layered stack structure.

Oxygen treatment of replacement work-function metals in CMOS transistor gates

A method of manufacturing a semiconductor device having metal gate includes providing a substrate having a first transistor and a second transistor formed thereon, the first transistor having a first gate trench formed therein, forming a first work function metal layer in the first gate trench, forming a sacrificial masking layer in the first gate trench, removing a portion of the sacrificial masking layer to expose a portion of the first work function metal layer, removing the exposed first function metal layer to form a U-shaped work function metal layer in the first gate trench, and removing the sacrificial masking layer. The first transistor includes a first conductivity type and the second transistor includes a second conductivity type. The first conductivity type and the second conductivity type are complementary.

Semiconductor device having metal gate and manufacturing method thereof

A semiconductor device having a metal gate includes a substrate having a first gate trench and a second gate trench formed thereon, a gate dielectric layer respectively formed in the first gate trench and the second gate trench, a first work function metal layer formed on the gate dielectric layer in the first gate trench and the second gate trench, a second work function metal layer respectively formed in the first gate trench and the second gate trench, and a filling metal layer formed on the second work function metal layer. An opening width of the second gate trench is larger than an opening width of the first gate trench. An upper area of the second work function metal layer in the first gate trench is wider than a lower area of the second work function metal layer in the first gate trench.

The present invention provides a method of manufacturing semiconductor device having metal gates. First, a substrate is provided. A first conductive type transistor having a first sacrifice gate and a second conductive type transistor having a second sacrifice gate are disposed on the substrate. The first sacrifice gate is removed to form a first trench. Then, a first metal layer is formed in the first trench. The second sacrifice gate is removed to form a second trench. Next, a second metal layer is formed in the first trench and the second trench. Lastly, a third metal layer is formed on the second metal layer wherein the third metal layer is filled into the first trench and the second trench.

Method of manufacturing semiconductor device having metal gates

A method of fabricating an electrical contact comprises the following steps. A substrate having at least a silicon region is provided. At least an insulation layer is formed on the substrate, wherein the insulation layer comprises at least a contact hole which exposes the silicon region. A metal layer is formed on sidewalls and bottom of the contact hole. An annealing process is performed to form a first metal silicide layer in the silicon region nearby the bottom of the contact hole. A conductive layer covering the metal layer and filling up the contact hole is then formed, wherein the first metal silicide layer is transformed into a second metal silicide layer when the conductive layer is formed.

Method of fabricating electrical contact

The present invention provides a method of manufacturing semiconductor device having metal gate. First, a substrate is provided. A first conductive type transistor having a first sacrifice gate and a second conductive type transistor having a second sacrifice gate are disposed on the substrate. The first sacrifice gate is removed to form a first trench and then a first metal layer and a first material layer are formed in the first trench. Next, the first metal layer and the first material layer are flattened. The second sacrifice gate is removed to form a second trench and then a second metal layer and a second material layer are formed in the second trench. Lastly, the second metal layer and the second material layer are flattened.

Method of manufacturing semiconductor device having metal gate

A method of manufacturing a metal oxide semiconductor is provided. The method includes forming an offset spacer and a disposable spacer around the offset spacer. Then, forming a plurality of epitaxial layers outside the disposable spacer and removing the disposable spacer. In addition, the method includes forming a plurality of source/drain extension areas in the substrate outside the offset spacer and the epitaxial layers. Because the source/drain extension areas are formed after the selective epitaxial growth process, the thermal of the selective epitaxial growth process does not damage the source/drain extension areas.

Method of manufacturing metal oxide semiconductor and complementary metal oxide semiconductor

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Tai-Nan, Taiwan

Tsung-Lung Tsai