United Microelectronics Corp.

Tsung-Hsun Tsai

Kuo-Chih Lai

Chia-Chang Hsu

Pin-Hong Chen

Shin-Chi Chen

Chih-Yueh Li

Chun-Ling Lin

Ted Ming-Lang Guo

Bor-Shyang Liao

Min-Chung Cheng

Bo-Syuan Lee

Shu-Min Huang

Chi-Sheng Chen

Yu-Chin Cheng

A method for fabricating a semiconductor device includes the steps of: providing a substrate having a first region, a second region, and a third region; forming a first gate oxide layer on the first region, the second region, and the third region; and performing an etching process and an infrared treatment process at the same time to completely remove the first gate oxide layer on the second region for exposing the substrate.

Method for fabricating semiconductor device

A new method for fabricating a semiconductor device with high selection phosphoric acid solution and eliminating the step of oxide removal and thus reducing oxide loss to improve yield gain and cost saving.

Method for fabricating a semiconductor device

The present invention provides a method for improving the quality of a high-voltage metal oxide semiconductor (HV MOS), the method includes: firstly, a substrate is provided, next, a hard mask layer is formed on the substrate, an oxygen plasma treatment is then performed to the hard mask layer, so as to form an oxide layer on the hard mask layer. Afterwards, a patterned photoresist layer is formed on the oxide layer, and a first cleaning process is performed to a top surface of the oxide layer after the patterned photoresist layer is formed, wherein the first cleaning process comprises rinsing the oxide layer with carbonated water. Next, a first etching process is performed to remove parts of the hard mask layer, and the patterned photoresist layer is then removed. Afterwards, a second etching process is performed, to remove the oxide layer.

Method for improving the quality of a high-voltage metal oxide semiconductor

The invention provides a method of epitaxial structure formation in a semiconductor, comprising: providing a substrate; performing a dry etch to form a first recess; after performing the dry etch, performing a SPM cleaning process on the substrate by using a nozzle spraying SPM solution with an angle greater than zero and less than 45 degrees relative to the substrate; after performing the SPM cleaning process, performing a wet etch to form a second recess; after performing the wet etch, performing a pre-epi cleaning process; and growing an epitaxial structure in the second recess.

Method of epitaxial structure formation in a semiconductor

A method for fabricating a semiconductor device is provided. The method includes the following steps. Firstly, a substrate having a nitride layer and a platinum (Pt)-containing nickel (Ni)-semiconductor compound layer is provided. Then the nitride layer and the Pt are removed in situ with a chemical solution including a sulfuric acid component and a phosphoric acid component.

A method for removing silicon nitride material includes following steps. A substrate having at least a gate structure formed thereon is provided, and at least a silicon nitride hard mask is formed on top of the gate structure. A first removal is performed to remove a portion of the silicon nitride hard mask with a first phosphoric acid (HPO) solution. A second removal is subsequently performed to remove remnant silicon nitride hard mask with a second phosphoric acid solution. The first removal and the second removal are performed in-situ. A temperature of the second phosphoric acid solution is lower than a temperature of the first phosphoric acid solution.

Method for removing nitride material

A method of processing a substrate is provided. The method includes providing a substrate, performing a device forming process on the substrate, and cleaning the substrate. The step of cleaning the substrate includes cleaning the substrate with an atomic spray and rinsing the substrate with deionized water.

Method of processing substrate

A method for thermal processing a semiconductor wafer is disclosed. A rapid thermal processing (RTP) chamber encompasses a heating means, a rotation means, and a cooling system for cooling walls of said RTP chamber. A semiconductor wafer is loaded into the RTP chamber just being cooling down to a first temperature by using the cooling system. When loading the semiconductor wafer, it has a temperature that is lower than the first temperature, thereby causing a tendency of particle deposition from the walls of the RTP chamber onto the semiconductor wafer. The semiconductor wafer is pre-heated to a second temperature higher than the first temperature with the heating means, thereby eliminating the tendency of particle deposition. Upon reaching the second temperature, the rotation means is activated to start to rotate the semiconductor wafer, while the semiconductor wafer being ramped up to a third temperature.

Growing community of inventors

Chiayi County, Taiwan

Tsung-Hsun Tsai