National Taiwan University

Mediatek Corporation

Toshiba Global Commerce Solutions Holdings Corporation

Sitronix Technology Corporation

Tsung-Hsien Lin

Wei-Hao Chiu

Yu-Yu Chen

Chan-Hsiang Weng

Yi-Lin Tsai

Bang-Cyuan Wang

Yu-Hsiang Huang

Yi-Sheng Lee

Wei-Yi Hsuan

Jian-You Chen

Ching-Tang Chang

Chun-Kuan Wu

Sung-Lin Tsai

Chung-Hsing Yang

Fong-Wen Lee

Chih-Chan Tu

Cheng-En Liu

Chen-Chien Lin

Systems, methods, and mobile computing devices for purchase of items and delivery to a location within a predetermined communication range are disclosed. According to an aspect, a mobile computing device includes a first communications module having a predetermined communication range and configured to receive an indication of one or more items for purchase and delivery to a location within the predetermined communication range. The mobile computing device also includes a user interface and an item ordering manager. The item ordering manager is configured to receive user input via the user interface for selecting one or more of the items for purchase and delivery to the location within the predetermined communication range. The item ordering manager is also configured to use the communications module to communicate identification of the one or more of the items to a second communications module within the predetermined communication range.

Systems, methods, and mobile computing devices for purchase of items and delivery to a location within a predetermined communication range

A biomedical signal sensing circuit including a first and a second modulation unit, an amplifying unit, a first and a second demodulation unit is provided. The first modulation unit performs a first modulation operation to a first biomedical signal according to a first signal to generate a first modulation signal. The second modulation unit performs a second modulation operation to a second biomedical signal according to a second signal to generate a second modulation signal. The amplifying unit amplifies the first and second modulation signals, and adds the amplified first and second modulation signals to generate a third modulation signal. The first demodulation unit performs a first demodulation operation to the third modulation signal according to the first signal to generate a first sensing signal. The second demodulation unit performs a second demodulation operation to the third modulation signal according to the second signal to generate a second sensing signal.

Biomedical signal sensing circuit

The present invention relates to an analog-to-digital converting circuit with temperature sensing and the electronic device thereof. The present invention uses a first impedance device to receive a reference voltage and produces an input current according to a temperature. An analog-to-digital converting unit is coupled to the first impedance device and produces a digital output signal according to the input current. Thereby, according to the present invention, by integrating the first impedance device into the analog-to-digital converting circuit, the circuit area and the power consumption can be lowered, which further reduces the cost and improves the accuracy of temperature sensing.

Analog-to-digital converting circuit with temperature sensing and electronic device thereof

A frequency tracking circuit is disclosed. The frequency tracking circuit includes an edge selector, a phase-frequency processor and a digital controlled oscillator. The edge selector receives a data signal and feedback clock signal and sequentially outputs a data edge signal and a feedback-clock-edge signal. The phase-frequency processor receives the data edge signal and the feedback-clock-edge signal and outputs a frequency adjusting digital signal after executing differential operation according to a first phase difference and a second phase difference. The digital controlled oscillator receives the frequency adjusting digital signal so as to adjust frequency of the feedback clock signal. The phase-frequency processor outputs a frequency tracking signal to the edge selector, wherein the edge selector utilizes the frequency tracking signal for acquiring the data edge signal and utilizes the data edge signal for acquiring the feedback-clock-edge signal.

Frequency tracing circuit and method thereof

A signal demodulation module is disclosed. The signal demodulation module includes an injection-locked oscillator, an envelope detector and a data slicer. The injection-locked oscillator has a central oscillating frequency equal to a frequency of a digital modulation signal received, and outputs a phase-locked oscillating signal which is in phase to the digital modulation signal. When input phase of the digital modulation signal changes, output phase of the injection-locked oscillator changes synchronously. The envelope detector is used for detecting an envelope line of the phase-locked oscillating signal and outputting an envelope signal accordingly. The data slicer is used for receiving the envelop signal and outputting a first digital signal according to a reference voltage and the envelop signal.

Receiver, signal demodulation module and demodulation method thereof

A phase locked loop includes a voltage controlled oscillator operable to generate an output signal corresponding to a reference signal in response to a control voltage signal outputted by a filter in response to a current signal, and a variable frequency divider operable to perform frequency division on the output signal using a variable divisor so as to generate a divided feedback signal. A charge pump outputs the current signal in response to a phase detecting output from a phase/frequency detector indicating phases of the divided feedback signal and the reference signal. A phase error comparator outputs, in accordance with the phase detecting output, a digital output indicating whether the divided feedback signal lags or leads the reference signal and further indicating a phase difference between the divided feedback signal and the reference signal. The variable frequency divider determines a value of the variable divisor in accordance with the digital output to reduce the phase difference between the divided feedback signal and the reference signal.

Phase locked loop capable of fast locking

A modulator is constructed with a loop-delay compensation. A delta-sigma modulator generates a quantization code, and a digital compensation filter receives the quantization code and outputs a digital code. The digital compensation filter then feeds the digital code back to the delta-sigma modulator.

Modulator with loop-delay compensation

A bandpass delta-sigma modulator is formed to include a bandpass filtering circuit that bandpass filters an input signal. An analog-to-digital converter (ADC) receives output of the bandpass filtering circuit and generates an output quantization code. A digital filter receives the output quantization code. A digital-to-analog converter (DAC) receives output of the digital filter and scales the value of the output quantization code by DAC coefficients to the bandpass filtering circuit.

Bandpass delta-sigma modulator

A voltage-to-digital converting device includes a first voltage-to-time converter outputting a first delay clock having a first time delay relative to a reference clock in response to an input voltage, and a second voltage-to-time converter outputting a second delay clock having a second time delay relative to the reference clock in response to a feedback voltage. The first and second time delays correspond respectively to the input and feedback voltages. A time-to-digital converting circuit receives the first and second delay clocks from the first and second voltage-to-time converters, compares phases of the first and second delay clocks, generates the feedback voltage based on result of phase comparison made thereby, and outputs a digital signal upon detecting that the phases of the first and second delay clocks are in-phase.

Voltage-to-time converter, and voltage-to-digital converting device having the same

The invention provides a continuous-time delta sigma modulator. In one embodiment, the continuous-time delta sigma modulator comprises a series of integrators, a quantizer, and a loop delay compensation circuit. The integrators are coupled in series and generate an analog output signal according to an analog input signal. The quantizer quantizes the analog output signal according to a reference voltage to generate a digital output signal as the output of the continuous-time delta sigma modulator. The loop delay compensation circuit adjusts the reference voltage of the quantizer according to the digital output signal to compensate the continuous-time delta sigma modulator for a loop delay.

Growing community of inventors

Taipei, Taiwan

Tsung-Hsien Lin