Taiwan Semiconductor Manufacturing Comp. Ltd.

Tsung-Chih Chien

Chih-Tsung Shih

Tsung Chuan Lee

Hao-Shiang Chang

Hui-Min Huang

Bo-Tsun Liu

Shih-Chi Fu

Chi-Hua Fu

Kuotang Cheng

Shy-Jay Lin

Burn Jeng Lin

Jaw-Jung Shin

Heng-Jen Lee

Shih-Chi Wang

Tsung-Chuan Lee

Jui-Chieh Chen

Ching-Yu Chang

Hung-Jui Kuo

Chin-Hsiang Lin

Tien-I Bao

Chih Wei Lu

Hua-Tai Lin

Kuei Shun Chen

Ko-Bin Kao

Yung-Cheng Chen

Li-Kong Turn

Bang-Chein Ho

A reticle enclosure includes a base including a first surface, a cover including a second surface and coupled to the base with the first surface facing the second surface. The base and the cover form an internal space that includes a reticle. The reticle enclosure includes restraining mechanisms arranged in the internal space and for securing the reticle, and structures disposed adjacent the reticle in the internal space. The structures enclose the reticle at least partially, and limit passage of contaminants between the internal space and an external environment of the reticle enclosure. The structures include barriers disposed on the first and second surfaces. In other examples, a padding is installed in gaps between the barriers and the first and second surfaces. In other examples, the structures include wall structures disposed on the first and second surfaces and between the restraining mechanisms.

Method of manufacturing semiconductor device

An extreme ultraviolet (EUV) mask includes a multilayer Mo/Si stack comprising alternating Mo and Si layers disposed over a first major surface of a mask substrate, a capping layer made of ruthenium (Ru) disposed over the multilayer Mo/Si stack, and an absorber layer on the capping layer. The EUV mask includes a circuit pattern area and a particle attractive area, and the capping layer is exposed at bottoms of patterns in the particle attractive area.

Extreme ultraviolet mask and method of manufacturing the same

A method for preventing photomask contamination includes securing a photomask on a bottom surface of an electrostatic chuck; generating a first voltage at a peripheral area of the bottom surface of the electrostatic chuck to attract a particle onto the peripheral area of the bottom surface of the electrostatic chuck, wherein the peripheral area of the bottom surface of the electrostatic chuck is not directly above the photomask; after generating the first voltage, generating a second voltage at the peripheral area of the bottom surface of the electrostatic chuck to repulse the particle, wherein the first voltage and the second voltage have opposite electrical properties; and generating a third voltage, by using a collecting plate, near a sidewall of the photomask to attract the repulsed particle.

Operating method for preventing photomask particulate contamination

Reticle enclosure for lithography systems

A method for preventing photomask contamination includes generating a first electric field from an electrostatic chuck to attract a charged particle onto the electrostatic chuck, controlling the first electric field to detach the charged particle from the electrostatic chuck, and generating a second electric field below the electrostatic chuck to attract the charged particle.

Semiconductor apparatus and method of operating the same for preventing photomask particulate contamination

A method includes reducing refractive index of an environment at or adjacent an extreme ultraviolet (EUV) mask to below 1.0. The EUV mask is in an EUV lithography system that forms a projection beam of EUV radiation using EUV radiation emitted from a radiation source. The method further includes exposing the EUV mask to the projection beam of EUV radiation.

Method to reduce native defect printability

A charged particle multi-beam lithography system includes an illumination sub-system that is configured to generate a charged particle beam; and multiple plates with a first aperture through the plates. The plates and the first aperture are configured to form a charged particle doublet. The system further includes a blanker having a second aperture whose footprint is smaller than that of the first aperture. The charged particle doublet is configured to demagnify a portion of the charged particle beam passing through the first aperture, thereby producing a demagnified beamlet. The blanker is configured to receive the demagnified beamlet from the charged particle doublet, and is further configured to conditionally allow the demagnified beamlet to travel along a desired path.

Apparatus for charged particle lithography system

A method of fabricating a Digital pattern generator (DPG) device is disclosed. The method includes forming an etch-stop-layer (ESL) over a bonding pad in a first region over a substrate, forming a pixel well in the second region over the substrate, forming an anti-charging layer over the bonding pad and along sidewalls of the pixel well. The bonding pad is covered by the ESL during the forming of the anti-charging layer over the bonding pad. The method also includes removing the anti-charging layer over the bonding pad. Therefore, after removing the anti-charging layer over the bonding pad, the bonding pad remains covered by the ESL.

Bonding pad surface damage reduction in a formation of digital pattern generator

An apparatus for use in a charged particle multi-beam lithography system is disclosed. The apparatus includes a plurality of charged particle doublets each having a first aperture and each configured to demagnify a beamlet incident upon the first aperture thereby producing a demagnified beamlet. The apparatus further includes a plurality of charged particle lenses each associated with one of the charged particle doublets, each having a second aperture, and each configured to receive the demagnified beamlet from the associated charged particle doublet and to realize one of two states: a switched-on state, wherein the demagnified beamlet is allowed to travel along a desired path, and a switched-off state, wherein the demagnified beamlet is prevented from traveling along the desired path. In embodiments, the first aperture is greater than the second aperture, thereby improving particle beam efficiency in the charged particle multi-beam lithography system.

A wafer edge exposure module connected to a semiconductor wafer track system. The wafer edge exposure module includes a wafer spin device, an optical system, a scanner interface module, and a controller. The wafer spin device supports a wafer for processing. The optical system directs exposure light on a respective edge portion of the wafer simultaneously to create a dummy track on the edge of the wafer. The scanner interface module sends and/or receives dummy edge exposure information from a scanner via a computer network. The controller receives the dummy edge exposure information from the scanner interface module and uses the exposure information to control the optical system.

Wafer edge exposure module

A method of inhibiting photoresist pattern collapse which includes the steps of providing a substrate; providing a photoresist layer on the substrate; exposing and developing the photoresist layer; applying a top anti-reflective coating layer to the photoresist layer; rinsing the photoresist layer; and drying the photoresist layer.

Growing community of inventors

Nantou County, Taiwan

Tsung-Chih Chien