Silicon Motion, Inc.

Other

United Microelectronics Corp.

Tsinghua University

Tsung-Chieh Yang

Hong-Jung Hsu

Wen-Long Wang

Yang-Chih Shen

Jian-Dong Du

Ching-Hui Lin

Hsiao-Te Chang

Chun-Chieh Kuo

Sheng-I Hsu

Chia-Jung Hsiao

Zhen-U Liu

Pi-Ju Tsai

Li-Sheng Kan

An-Chi Liu

Shin-Chi Chen

Chih-Yueh Li

Yeong-Luh Ueng

Chih-Chung Chen

Chen-Yu Weng

Kuan-Chieh Wang

Pei-Ching Yeh

Chun-Jung Chen

A flash memory controller, to be coupled between a host device and a flash memory module, includes an error correction code (ECC) circuit. The ECC circuit performs a wordline-dimensional ECC operation upon specific data, sent from the host device to form a super block stored within the flash memory module, to generate wordline-dimensional parity data and performs a finger-dimensional ECC operation upon the specific data generate finger-dimensional parity data. The ECC circuit corrects an error of the superblock by using the wordline-dimensional parity data and the finger-dimensional parity data so as to obtain correct data content of the specific data.

Flash memory controller, operating method of flash memory controller, and storage device capable of performing different dimension error correction to protect data

The invention provides a method for accessing a flash memory module, wherein the method includes the steps of: classifying multiple read retry tables into at least a first group and a second group to establish a classifying and sorting table, wherein each of the multiple read retry tables records at least one reading voltage, and any two read retry tables do not have exactly the same reading voltage; selecting a first read retry table from the first group to read a page of a block of the flash memory module to generate first read data; and when a decoder fails to decode the first read data, selecting a second read retry table from the first group to read the page of the block of the flash memory module to generate second read data for the decoder to decode.

Method for accessing flash memory module and associated flash memory controller and electronic device

A method for performing data retention management of a memory device with aid of pre-shutdown control and associated apparatus are provided. The method may include: receiving a predetermined host command from a host device; in response to the predetermined host command, performing a re-programming procedure on the NV memory, for enhancing data storage reliability of the memory device, for example, reading stored data from at least one source location within the at least one NV memory element to prepare re-programming data according to the stored data, and programming the re-programming data into at least one destination location within the at least one NV memory element to be replacement of the stored data; and in response to the re-programming procedure being completed, sending completion information of the predetermined host command to the host device, to allow the host device to trigger the shutdown of the memory device.

Method and apparatus for performing data retention management of memory device with aid of pre-shutdown control

A flash memory storage management method includes: providing a flash memory module including single-level-cell (SLC) blocks and at least one multiple-level-cell block such as MLC block, TLC block, or QLC block; classifying data to be programmed into groups of data; respectively executing SLC programing and RAID-like error code encoding to generate corresponding parity check codes, to program the groups of data and corresponding parity check codes to the SLC blocks; when completing program of the SLC blocks, performing an internal copy to program the at least one multiple-level-cell block by sequentially reading and writing the groups of data and corresponding parity check codes from the SLC blocks to the multiple-level-cell block according to a storage order of the SLC blocks.

Flash memory apparatus and storage management method for flash memory

A method for performing memory access of a Flash cell of a Flash memory includes: performing a series of sensing operations respectively corresponding to a plurality of sensing voltages, wherein a sensing voltage of a specific sensing operation of the series of sensing operations has a sensing voltage determined according to a result of an initial sensing operation of the series of sensing operations; determining a threshold voltage of the Flash cell according to at least a digital value generated by the series of sensing operations; and using the determined threshold voltage to perform soft decoding of the Flash cell.

Memory access module for performing a plurality of sensing operations to generate digital values of a storage cell in order to perform decoding of the storage cell

A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.

Flash memory controller

A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.

The present invention provides a control method of the memory device. In the operation of the memory device, the soft information is compressed by a control circuit within the flash memory module, so that the second readout information including the compressed soft information transmitted by the flash memory module has much smaller data size. Therefore, the performance of the memory interface will not be affected due to the bandwidth occupied by the soft information transmission.

Memory device with compressed soft information and associated control method

An exemplary method for reading data stored in a flash memory includes: selecting an initial gate voltage combination from a plurality of predetermined gate voltage combination options; controlling a plurality of memory units in the flash memory according to the initial gate voltage combination, and reading a plurality of bit sequences; performing a codeword error correction upon the plurality of bit sequences, and determining if the codeword error correction successful; if the codeword error correction is not successful, determining an electric charge distribution parameter; determining a target gate voltage combination corresponding to the electric charge distribution parameter by using a look-up table; and controlling the plurality of memory units to read a plurality of updated bit sequences according to the target gate voltage combination.

Method, memory controller, and memory system for reading data stored in flash memory

A method for reading data stored in a flash memory includes at least the following steps: controlling the flash memory to perform a plurality of read operations upon a plurality of memory cells included in the flash memory; obtaining a plurality of bit sequences read from the memory cells, respectively, wherein the read operations read bits of a predetermined bit order from the memory cells by utilizing different control gate voltage settings; and determining readout information of the memory cells according to binary digit distribution characteristics of the bit sequences.

Method and apparatus for reading data stored in flash memory by referring to binary digit distribution characteristics of bit sequences read from flash memory

A method for performing data management of a memory device with aid of targeted protection control and associated apparatus are provided. The method may include: receiving a first host command from a host device; sending a first operating command to a non-volatile (NV) memory to read first stored data from a first location within the NV memory; monitoring a read count of the first location to determine whether the read count of the first location reaches a read count threshold; monitoring at least one error bit count of other stored data of at least one other location within the NV memory to determine whether the at least one error bit count reaches an error bit count threshold; and starting a targeted protection procedure to process second stored data, for preventing the second stored data from being damaged by at least one reading behavior of the host device.

Method and apparatus for performing data management of memory device with aid of targeted protection control

A method for reading data stored in a flash memory. The flash memory comprises a plurality of memory cells and each memory cell has a particular threshold voltage. The method includes: obtaining a first threshold voltage distribution representing threshold voltages of a first group of the memory cells; obtaining a second threshold voltage distribution representing threshold voltages of a second group of the memory cells, wherein the second threshold voltage distribution is different from the first threshold voltage distribution, and the first group of the memory cells comprises at least a part of the second group of the memory cells; and controlling the flash memory to perform at least one read operation upon the first group of the memory cells according to the second threshold voltage distribution.

Method for reading data stored in a flash memory according to a voltage characteristic and memory controller thereof

A method for performing memory access of a Flash cell of a Flash memory includes: performing a plurality of sensing operations respectively corresponding to a plurality of sensing voltages to generate a first digital value and a second digital value of the Flash cell, the second digital value representing at least one candidate threshold voltage of the Flash cell; determining a threshold voltage of the Flash cell according to whether the at least one candidate threshold voltage is high or low; determining soft information of a bit stored in the Flash cell according to the threshold voltage of the Flash cell; and using the soft information to perform soft decoding.

Growing community of inventors

Hsinchu, Taiwan

Tsung-Chieh Yang