Kabushiki Kaisha Toshiba

Tokyo Shibaura Denki Kabushiki Kaisha

Tsunetoshi Arikado

Katsuya Okumura

Yukihiro Ushiku

Iwao Higashikawa

Ichiro Mizushima

Haruo Okano

Yoshitaka Tsunashima

Kiyotaka Miyano

Yasushi Akasaka

Takayuki Hiraoka

Shinichi Ito

Kyoichi Suguro

Katsuhiko Hieda

Nobuo Hayasaka

Takashi Nakao

Hajime Nagano

Yuuichi Mikata

Hiroaki Yamada

Yasuhiro Horiike

Makoto Sekine

Hideaki Sakurai

Soichi Nadahara

Shuichi Samata

Masao Iwase

Hiroshi Matsushita

Norihiko Tsuchiya

Shinichi Nitta

Junji Sugamoto

Katsujiro Tanzawa

Moriya Miyashita

Akitoshi Kumagae

Seiichi Miyazaki

Yuso Udo

Takaaki Kawahara

Kazuyoshi Torii

Hiroshi Kitajima

Koji Sakui

Masaru Koyanagi

Chiaki Takubo

Koji Yamakawa

Keiji Horioka

Mie Matsuo

Osamu Arisumi

Hideyuki Kanai

Kazuhide Yoneya

Hidemi Ishiuchi

Kyoioni Suguro

A semiconductor device including a semiconductor substrate having on its surface a recess and at least one projection formed in the recess. The projection has a channel region and an element isolating insulating film is formed in the recess. A MIS type semiconductor element is formed on the semiconductor substrate and includes a gate electrode formed on the channel region of the projection via a gate insulating film. Source and drain regions are formed to pinch the channel region of the projection therebetween. A channel region of the MIS type semiconductor element is formed to reach the at least one projection located adjacent to the MIS type semiconductor element in its channel width direction via the recess. A top surface of the at least one projection is located higher than the top surface of the element isolating insulating film by 20 nm or more.

Semiconductor device having an element isolating insulating film

A semiconductor wafer has a bevel contour formed along the periphery thereof, products formed on the wafer, and an ID mark formed on the bevel contour. The ID mark shows at least the properties, manufacturing conditions, and test results of the products.

Semiconductor wafer with ID mark, equipment for and method of manufacturing semiconductor device from them

A gate insulating film on a silicon substrate of includes a SiOfilm and a high-k film. The high-k film contains a transition metal, aluminum, silicon, and oxygen. The concentration of silicon in the high-k film is higher than the concentrations of the transition metal and aluminum in the vicinity of the interface with the SiOfilm and the vicinity of the interface with the gate electrode. Furthermore, it is preferable that the concentration of silicon is the highest at least in one of the vicinity of the interface with the SiOfilm or the vicinity of the interface with the gate electrode, gradually decreases with distance from these interfaces, and becomes the lowest in a central part of the high-k film.

Semiconductor device and method for manufacturing the same

A semiconductor device includes a plurality of cell arrays, a selection control circuit to generate and to output a selection control signal. An array selection circuit generates internal address signals on the basis of an external address signal and the selection control signal. The array selection circuit outputs the internal address signals to the plurality of cell arrays to select ones of the cell arrays. A sales method for selling semiconductor devices includes presenting function-related information and price-related information on partially good semiconductor devices to client terminals and prompting the client terminals to provide purchase/non-purchase information and determining the possibility of successful transactions on the basis of the purchase/non-purchase information. A sales system for selling semiconductor devices uses the sales method and a sales program product for causing a computer system to sell semiconductor devices using the sales method.

Semiconductor device, sales method for semiconductor device, sales system for semiconductor device and program product storing sales program for semiconductor device

A gate insulating film on a silicon substrate includes a SiOfilm and a high-k film. The high-k film contains a transition metal, aluminum, silicon, and oxygen. The concentration of silicon in the high-k film is higher than the concentrations of the transition metal and aluminum in the vicinity of the interface with the SiOfilm and the vicinity of the interface with the gate electrode. Furthermore, it is preferable that the concentration of silicon is the highest at least in one of the vicinity of the interface with the SiOfilm or the vicinity of the interface with the gate electrode, gradually decreases with distance from these interfaces, and becomes the lowest in a central part of the high-k film.

In using an epitaxial growth method to selectively grow on a silicon substrate an epitaxial layer on which an element is to be formed, the epitaxial layer is formed so as to extend upward above a thermal oxide film that is an element isolating insulating film, in order to prevent formation of facets. Subsequently, unwanted portions of the epitaxial layer are removed by means of CMP to complete an STI element isolating structure.

Semiconductor device and method for manufacturing

An apparatus for predicting life expectancy of a rotary machine includes: a load recipe input module acquiring loading conditions of a rotary machine; a characterizing feature input module obtaining characterizing feature data of a rotary machine; and a life expectancy prediction module calculating life expectancy of the rotary machine in conformity with the loading conditions and the characterizing feature data.

Apparatus for predicting life of rotary machine and equipment using the same

An apparatus for predicting life expectancy of a rotary machine includes: a load recipe input module acquiring loading conditions of a rotary machine; a characterizing feature input module obtaining characterizing feature data of a rotary machine; and a life expectancy prediction module calculating life expectancy of the rotary machine in conformity with the loading conditions and the characterizing feature datap.

Method for predicting life of rotary machine and determining repair timing of rotary machine

Provided is a stacked type semiconductor device formed of a plurality of semiconductor integrated circuit devices stacked, each having a specification and including a semiconductor integrated circuit chip, wherein at least three of the semiconductor integrated circuit devices are stacked in the order of a value of the specification.

Stacked type semiconductor device

A substrate to be processed on which a thin film is formed is supported by a support member. The substrate to be processed is heated by a heating section. The surface temperature is measured by a radiation thermometer, and the heating temperature of the heating section is controlled by a control section, in response to the temperature measured by the radiation thermometer. Further, a blackbody is provided at a position optically symmetrical to the radiation thermometer with respect to the surface of the thin film. The blackbody is set at a constant temperature. The blackbody cuts stray light (noise light) which enters into the radiation thermometer.

Heat treatment method and a heat treatment apparatus for controlling the temperature of a substrate surface

A semiconductor device comprises a semiconductor substrate and a capacitor provided above the semiconductor substrate and having an upper electrode, a lower electrode, and a dielectric film provided between the upper electrode and the lower electrode. At least one of the electrodes comprises an SrRuO film provided near the dielectric film and a conductive film made of conductive material other than SrRuO and provided far from the dielectric film.

Ferroelectric capacitor with means to prevent deterioration

A semiconductor memory device comprises a matrix of memory cells, each having a transistor and a capacitor. A first electrode, a dielectric film and a second electrode are sequentially staked on a silicon monocrystalline substrate and epitaxially grown to form a capacitor having a multilayer structure. Then, an SOI layer is formed on the monocrystalline substrate carrying thereon the capacitor with an insulator film interposed therebetween. A source/drain diffusion layer is formed in the SOI layer and a gate electrode is formed to produce a MOS transistor. Either the source or the drain of the source/drain diffusion layer of the transistor is connected to the second electrode by way of the polysilicon layer in the contact hole running through the SOI layer and the insulator film layer.

Semiconductor memory device and method of manufacturing the same

Growing community of inventors

Tokyo, Japan

Tsunetoshi Arikado