Fujitsu Quantum Devices Limited

Eudyna Devices Inc.

Tsuneo Tokumitsu

Osamu Baba

Hideki Tango

Osamu Anegawa

An electronic circuit device includes a negative resistance generating circuit, a second transistor and a path. The negative resistance generating circuit has a first transistor having a control terminal coupled to a resonator. The second transistor has a control terminal coupled to an output terminal of the first transistor and has an output terminal coupled to a DC bias terminal. The path is coupled to between the DC bias terminal and an output terminal of the first transistor through the second transistor and provides a bias to the first transistor.

Electronic oscillator circuit device

An electronic device includes a first transmission line, a second transmission line and a ground-coupling portion. The first transmission line is composed of a first signal line transmitting a given high frequency wave signal and a first ground. The second transmission line is composed of a second signal line transmitting the high frequency wave signal and a second ground. The ground-coupling portion couples the first ground and the second ground. A phase difference between the high frequency wave signals at both ends of the ground-coupling portion is substantially integral multiple of 180 degrees.

Electronic device

A negative resistance circuit having an output terminal is connected to a first terminal of a strip shaped resonator. Anode of a variable capacitance diode is connected to a second terminal of the strip shaped resonator via a capacitor &prime;. Cathode of the variable capacitance diode is grounded. One terminal of a high impedance strip shaped line is connected to the anode of the variable capacitance diode. Other terminal of the strip shaped line is grounded via a capacitor . The capacitor has sufficiently low impedance at an oscillation frequency.

Microwave voltage-controlled-oscillator

A damping resistance is connected between the drain D of an FET and a first end T of an output transmission line , and a damping resistance is connected between the drain D of an FET and the first end T . The source of the FET and the gate of the FET are connected to a ground plane on the back surface of a substrate through a via which has a parasitic inductance when a multiplied frequency exceeds 20 GHz. The gate of the FET and the source of the FET receive microwaves of the same frequency and phase through an input transmission line

Growing community of inventors

Yamanashi, Japan

Tsuneo Tokumitsu