Kabushiki Kaisha Toshiba

Toshiba Electronic Devices & Storage Corporation

Tdk Corporation

The Furukawa Electric Co., Ltd.

Suzuki Mechanical Engineering Co., Ltd.

Nippon Sanso Kabushiki Kaisha

Toshiba Computer Engineering Corporation

Tsuneo Suzuki

Hiroshi Yoshida

Hideharu Moro

Yoshiharu Nito

Teruo Imayama

Tsutomu Chou

Hiroaki Ishihara

Toyoaki Uo

Junetsu Tamura

Takayuki Kato

Masaki Nishikawa

Shoji Ootaka

Katsuya Nonin

Hisashi Koaizawa

Masayoshi Oshiro

Kazuhiko Shibata

Yasuhiko Kitajima

Chikahisa Kawakami

Go Urakawa

Takashi Nagasaka

Tatsuya Yamamoto

Yuusuke Maeda

Souichi Honma

Shigeki Sato

Takafumi Yamaji

Masashi Takahashi

Masahiro Sakamoto

Hiroshi Ohashi

Yosuke Ogasawara

Tamotsu Ishiyama

Shinji Oshima

Michio Kondo

Shigeto Suzuki

Masahiro Karatsu

Masaaki Kanasugi

Hiroshi Masumoto

Yasuhiko Satomi

Tadayoshi Iwasaki

Kenkichi Suzuki

Takeshi Hirayama

Sadaki Satoh

Koichi Toyosaki

Hiroshi Miyake

Jyunetsu Tamura

Sadaki Sato

Shozo Tanaka

Yasunobu Shimada

Seiji Okino

Kiyoshi Yase

According to one embodiment, there is provided a magnetic coupling device including a first coil, a second coil, a third coil, a fourth coil, a first constant-potential node and a second constant-potential node. The second coil is electrically connected with one end of the first coil and wound in a direction opposite to a direction in which the first coil is wound. The third coil faces the first coil. The fourth coil faces the second coil. The first constant-potential node is electrically connected with one end of the third coil. The second constant-potential node is electrically connected with one end of the fourth coil.

Magnetic coupling device and communication system

A first device includes: a first reference signal source; a first transmitting/receiving unit which transmits two or more first carrier signals and receives two or more second carrier signals using an output of the first reference signal source; and a calculating unit. A second device includes: a second reference signal source configured to be operated independently from the first reference signal source; and a second transmitting/receiving unit configured to transmit two or more second carrier signals and receive two or more first carrier signals using an output of the second reference signal source. A frequency group of two or more first carrier signals and a frequency group of two or more second carrier signals differ from each other. The calculating unit calculates a distance between the first device and the second device based on a phase detection result obtained by receiving the first and second carrier signals.

Distance measurement device and distance measurement method

A glass body manufacturing apparatus includes: a first heating furnace including a furnace core tube accommodating the soot and a first heater, to supply a dehydration gas into the furnace core tube and heat the soot at a first treatment temperature lower than a softening point of the porous portion by the first heater; a second heating furnace including a structural body accommodating the soot and a second heater, to heat the soot at a second treatment temperature equal to or higher than the softening point by the second heater; and a conveyance container, connectable to each of the first and second heating furnaces while keeping airtightness with respect to the atmosphere, to accommodate and hold the soot, and convey the soot between the first and second heating furnaces.

Glass body manufacturing apparatus, glass body manufacturing method, soot conveying mechanism, and soot heating mechanism

A distance measuring apparatus according to an embodiment includes, a filter section configured to perform band limitation on a transmission signal and output the transmission signal, and to perform band limitation on a reception signal from an antenna section and output the reception signal, a distance measuring section configured to perform a distance measurement computation based on the transmission signal and the reception signal, and to obtain a delay of a signal passing through the filter section and perform calibration of the distance measurement computation, a signal interruption section configured to interrupt transmission of a signal between the filter section and the antenna section, and a control section configured to control the signal interruption section to interrupt the transmission of the signal during a period of the calibration.

Distance measuring apparatus and distance measuring system

A charge pump circuit of an embodiment includes a current mirror circuit, a first drive switch, a capacitor and a switch circuit. The current mirror circuit causes a current obtained by mirroring a reference current to flow to a first output terminal and a second output terminal. The first drive switch connects or disconnects the first output terminal and a charge pump output terminal. The switch circuit connects the capacitor either to a discharge path between the second output terminal and a node which provides a predetermined voltage or to a charge path between the charge pump output terminal and a GND.

Charge pump circuit and PLL circuit

A clock generation circuit includes a random number generator configured to generate random numbers according to a first probability distribution, a filter configured to output random numbers according to a second probability distribution, based on the random numbers according to the first probability distribution input thereto, and a variable delay circuit configured to modulate a clock signal input thereto by delaying edges of the clock signal by amounts corresponding to values of the random numbers according to the second probability distribution. Probability of a smallest number according to the second probability distribution is smaller than probability of the smallest number according to the first probability distribution, and probability of a largest number according to the second probability distribution is smaller than probability of the largest number according to the first probability distribution.

Clock generation circuit and wireless receiving device

According to one embodiment, there is provided a fractional frequency dividing circuit including an integral frequency dividing circuit and an adjustment circuit. The integral frequency dividing circuit is configured to convert a reference signal to K (K is a positive integer) phase signals. Each of the K phase signals has a frequency of one nth (n is a positive integer) of the reference signal and has different phases from each other. The adjustment circuit is configured to weighting-add a plurality of signals corresponding to the K phase signals and generate a fractional-frequency-divided signal. The fractional-frequency-divided signal has a frequency of m times (m is a positive integer that is not multiplies of n) of each of the plurality of phase signals.

Fractional frequency dividing circuit and transmitter

According to one embodiment, an adjacent-channel interference reject filter comprises a short-pulse inverter which includes a short-pulse sensor configured to detect a pulse in an intermediate frequency signal supplied to the device. The short-pulse sensor detects pulses having a pulse width less than or equal to some predetermined width. The short-pulse inverter also includes a pulse inverter configured to invert the pulse detected by the short-pulse sensor. The adjacent-channel interference reject filter may also include an inversion controller to control the inverting of detected short pulses. An adjacent-channel interference reject filter may be included in various devices such as wireless communication devices.

Adjacent-channel interference reject filter device, wireless communication device, and keyless entry device

According to one embodiment, a system for controlling an in-vehicle device is provided. The system has an in-vehicle device and an electronic control unit. The electronic control unit generates control signals to control the in-vehicle device and transmits the generated control signals to the in-vehicle device. The in-vehicle device has a semiconductor integrated circuit and a semiconductor memory circuit. The semiconductor integrated circuit is capable of performing a plurality of functional operations. The semiconductor memory circuit stores pieces of setting information necessary to perform the respective functional operations. The electronic control unit has a designation signal generation unit to output designation signals as the control signals. Each of the designation signals designates one of the pieces of setting information to be read from the semiconductor memory circuit. The semiconductor integrated circuit receives the designated one of the pieces of setting information which is read from the semiconductor memory circuit.

System for controlling an in-vehicle device

A binarization circuit includes a comparator that outputs a signal according to a differential voltage between the input and reference voltages. The first charging-discharging circuit generates a first voltage. The second charging-discharging circuit generates a second voltage. The control circuit compares the differential voltage with the threshold voltage, and switches between turn-on and turn-off of the second charging-discharging circuit based on a difference between the differential voltage and the threshold voltage. A sum of the reference and first voltages of the preceding clock is supplied to the comparator when the second charging-discharging circuit is turned off. A sum of the reference and the first and second voltages of the preceding clock is supplied to the comparator when the second charging-discharging circuit is turned on.

Binarization circuit, demodulation circuit, and tuner for vehicle

A comparator circuit according to an embodiment of the present invention includes a comparator configured to compare an input signal voltage with a reference voltage obtained by smoothing the input signal by use of a resistor and a capacitor, and output a result of the comparison, a discharge circuit configured to compare a first addition signal which is obtained by adding a positive first voltage to the input signal voltage, with the reference voltage, and discharge the capacitor when the first addition signal is lower than the reference voltage, and a charge circuit configured to compare a second addition signal which is obtained by adding a negative second voltage to the input signal voltage, with the reference voltage, and charge the capacitor when the second addition signal is higher than the reference voltage.

Comparator circuit for generating binarized data

A display device includes a first fiber having a silicon layer or an oxide layer, on which an active element is formed on the surface of the fiber and a second fiber forming a combined one-dimensional substrate together with the first fiber by being combined with the first fiber and having light emitting layers formed on a plurality of domains of the device. The first fiber and the second fiber are respectively drawn out from take-up jigs, are cut in necessary lengths and separated into plural fibers, and these plural first or second fibers are mounted in parallel with each other on a fixing jig. In this state, at least one-side elements of active elements and passive elements are formed on the first or second fibers.

Semiconductor device and display device using a one-dimensional substrate and device fabricating method thereof

Growing community of inventors

Kamakura, Japan

Tsuneo Suzuki