Olympus Corporation

Toshiba Memory Corporation

Kioxia Corporation

Nec Corporation

Smk Corporation

Other

Olympus Optical Company, Ltd.

Apollo Endosurgery, Inc.

Gifu University

Olympus Medical Systems Corporation

Tsukasa Kobayashi

Junichi Muramatsu

Koji Kato

Yuki Shimizu

Hideki Shimonaka

Hiroshi Maejima

Takayuki Suzuki

Ko Kimura

Yoshihiko Kamata

Yutaka Yanuma

Kiyotaka Matsuno

Takeshi Hioka

Tetsuya Yamamoto

Yuui Shimizu

Yoshinao Suzuki

Hideyuki Kataoka

Takumi Fujimoto

Keita Suzuki

Kosuke Yanagidaira

Yoshio Onuki

Koichi Kawashima

Mario Sako

Mitsunori Kubo

Takuyo Kodama

Miho Naka

Yoshino Nagasuka

Aya Mori

Yoko Deguchi

Go Fujimoto

Nao Tsuruta

Yoshihiko Sugi

Pankaj Jay Pasricha

Takeshi Nakano

Keiichi Arai

Tomonori Kurosawa

Yuji Sakamoto

Hiroshi Suzuki

Isao Sasaki

Sydney Sheung Chee Chung

Koh Kimura

Hiroyuki Morishita

Takashi Nagata

Isamu Nakajima

Kohei Oguni

Ichiro Yasuda

Stone retrieval basket for medical device

According to one embodiment, a semiconductor memory device includes first and second memory cells; a first word line connected to the first and second memory cells; a first bit line connected to the first memory cell; a second bit line connected to the second memory cell; a first sense amplifier connected to the first bit line; a second sense amplifier connected to the second bit line; a voltage generation circuit; and a first row decoder which supplies a voltage to the first word line.

Semiconductor memory device

A semiconductor memory device includes a substrate, first and second P-type well regions on the substrate, an N-type well region on the substrate and sandwiched between the first and second P-type well regions, a first peripheral circuit on a region of the first P-type well region adjacent to the N-type well region and supplied with a reference voltage via a first wiring, and a second peripheral circuit on a region of the second P-type well region adjacent to the N-type well region and supplied with a reference voltage via a second wiring.

A control meanssets, with respect to a packet transfer means, control information that defines an operation of the packet transfer meansaccording to header information of a packet. In a case of being set to a learning mode to learn a new record and in a case where an item corresponding to a condition that can be specified from an IP address is designated as an item a condition of which is to be learned, the control meanssets, in the packet transfer means, control information indicating permission for communication by a new packet when header information of the new packet is notified by the packet transfer means. Then, the control meansadds, to the list, a record in which a condition specified from an IP address in the header information is described in the designated item.

Communication apparatus, communication system, communication control method, communication program and device connection control program

Provided is a communication system in which an administrator can easily perform setting for communication. When having received a new packet, which is a packet for which control information conforming to header information has not been set yet, a packet transfer meansnotifies a control meansof header information of the new packet. The control meansholds a list of items that can be specified from an IP address, and sets control information in the packet transfer meanson the basis of an item specified from an IP address included in the header information and on the basis of the list, when the header information is notified from the packet transfer means

Communication system, communication control method, and communication program

A semiconductor memory device comprises a first memory cell array including a first memory cell and a second memory cell array including a second memory cell, a first transistor electrically connectable to a first end of the first memory cell via a first source line, a second transistor connectable to a first end of the second memory cell via a second source line, a pad supplied with a reference voltage from outside, a first wiring that electrically connects the first transistor and the pad, and a second wiring that is different from the first wiring and electrically connects the second transistor and the pad.

A semiconductor memory device includes a memory cell, a bit line connected to the memory cell, a sense amplifier connected to the memory cell through the bit line, and a control circuit. The sense amplifier includes a sense node connected to the bit line, a first capacitive element connected to the sense node and a sense transistor having a gate connected to the sense node. The control circuit is configured to adjust a voltage applied to a back gate of the sense transistor or a source of the sense transistor to correct a variation of a threshold voltage of the sense transistor.

Sense amplifier having a sense transistor to which different voltages are applied during sensing and after sensing to correct a variation of the threshold voltage of the sense transistor

A semiconductor memory device includes a memory cell, a bit line connected to the memory cell, and a sense amplifier connected to the memory cell through the bit line. The sense amplifier includes a sense node connected to the bit line, a first capacitive element connected to the sense node, and a static latch circuit connected to the sense node and retains data of the sense node.

Sense amplifier and latch circuit for a semiconductor memory device and method of operation thereof

According to one embodiment, a memory device includes a first memory cell; a second memory cell; a first bit line connected to the first memory cell; a second bit line connected to the second memory cell; a first word line connected to the first memory cell and the second memory cell; a first circuit configured to control a connection between the first bit line and a first node; and a second circuit configured to control a connection between the second bit line and the first node.

Method of operation of non-volatile memory device

A treatment tool for an endoscope includes a sheath which is extended along a longitudinal axis; a pre-curved portion which is disposed at a distal portion of the sheath; a knife wire lumen which is formed along the longitudinal axis of the sheath; a first communication hole and a second communication hole which are open on an outer circumferential surface to communicate the outer circumferential surface positioned with the knife wire lumen; a wire-shaped cutting portion which is protruded from the first communication hole and the second communication hole, and is extended in a position spaced from the outer circumferential surface and the virtual plane; a fixing portion which is provided to fix an end portion of a wire connected to the cutting portion inside the knife wire lumen, and a bending portion which is provided to bend the wire.

Treatment tool for endoscope and incision system

Growing community of inventors

Tokyo, Japan

Tsukasa Kobayashi