Taiwan Semiconductor Manufacturing Comp. Ltd.

Tsui-Mei Chen

Pei-Haw Tsao

Tsung-Jen Liao

Li-Huan Chu

Cheng-Hung Tsai

Nai-Cheng Lu

An-Tai Xu

Huang-Ting Hsiao

Sung-Sheng Chiu

Yu-Jung Lin

Shih-Hsing Lin

Cheng-Te Lin

Ju-Min Chen

Sean Lin

An integrated fan-out structure on a semiconductor die, method of making the same and method of testing the semiconductor die are disclosed. The semiconductor die includes a bond pad and a hole formed in the bond pad, a passivation layer formed over a portion of the bond pad, and a protective layer formed over the hole in the bond pad.

Integrated fan-out structures and methods for forming the same

The current disclosure describes carrier tape systems, which include a cover tape having adhesion areas and non-adhesion areas which are substantially free of adhesive. Methods for supplying semiconductor devices to an apparatus, which in operation, places the semiconductor devices at desired locations are also described. Methods of forming a semiconductor device carrier system are also described.

Carrier tape system and components and methods of use

The current disclosure describes carrier tape systems that include a carrier tape substrate and a cover tape. The carrier tape system includes a plurality of repetitive adhesion areas where the carrier tape substrate and cover tape are attached to each other and non-adhesion areas where the carrier tape substrate and cover tape are not attached to each other. Separating the cover tape and the carrier tape substrate at these repetitive adhesion and non-adhesion areas imparts a vibration to the cover tape which impedes or prevents semiconductor devices carried in pockets of the carrier tape substrate from adhering to adhesive on the cover tape.

Carrier tape system and methods of using carrier tape system

The various embodiments provide a semiconductor chip holder that holds semiconductor chips. The chip holder protects the semiconductor chips from possible damage during transport and/or storage. The chip holder is flexible and may be wound around a reel for convenient transport and storage. In one embodiment, the chip holder includes a support substrate with receptacles that receive semiconductor chips, a cover layer that seals the receptacles and holds the semiconductor chips within the receptacles, and plugs to securely couple the support substrate and the cover layer together.

Semiconductor chip holder

Packaging method and wafer structures are described. A semiconductor wafer having dies, scribe streets surrounding the dies and between the dies and test pads in the scribe streets is provided. Wafer testing is performed to the semiconductor wafer through the test pads. A laser grooving process is performed to the semiconductor wafer along the scribe streets and the test pads in the scribe streets are removed to form laser scanned regions in the scribe streets. A mechanical dicing process is performed cutting through the semiconductor wafer along the scribe streets to singulate the dies. The singulated dies are packaged.

Wafer structure and packaging method

According to an exemplary embodiment, a method of detecting edge cracks in a die under test is provided. The method includes the following operations: receiving a command signal; providing power from the command signal; providing a response signal based on the command signal; and self-destructing based on the command signal.

Growing community of inventors

Hsinchu, Taiwan

Tsui-Mei Chen