Fujitsu Corporation

Tsuguo Inata

Shunichi Muto

Atsushi Takeuchi

Yoshihiro Sugiyama

Toshio Fujii

Shigehiko Sasa

A resonant-tunneling transistor comprises a first semiconductor layer acting as a collector, a second semiconductor layer provided on the first semiconductor layer and forming a potential barrier of electrons in the conduction band, a third semiconductor layer provided on the second semiconductor layer and forming a quantum well of electrons in the conduction band, a fourth semiconductor layer provided on the third semiconductor layer and forming a quantum well of holes in the valence band, the fourth semiconductor layer simultaneously forming a potential barrier of electrons in the conduction band, a fifth semiconductor layer provided on the fourth semiconductor layer acting as an emitter, a first electrode provided in contact with the first semiconductor layer for recovering electrons therefrom, a second electrode provided in contact with the fifth semiconductor layer for injecting electrons thereinto, and an optical passage for introducing an optical beam to the first semiconductor layer.

Optically activated resonant-tunneling transistor

A non-linear optical device having the TBQ structure comprises an active layer forming a quantum well for interacting with an incident optical beam, an electron removal layer provided adjacent to the active layer at a first side thereof with a first barrier layer intervening therebetween for removing the electrons from the active layer; and a hole removal layer provided adjacent to the active layer at a second, opposite side of the active layer with a second barrier layer intervening therebetween for removing the holes from the active layer; wherein the first and second barrier layers have respective thicknesses determined such that the probability of tunneling of the electrons through the first barrier layer and the probability of tunneling of the holes through the second barrier layer are substantially equal with each other.

Non-linear optical device having an improved rate for recovery

A resonant tunnelling barrier (RTB) structure device (e.g., diode), having a large peak-to-valley current density (Jp/Jv) ratio, includes an InP substrate and a RTB structure structure. The RTB structure is formed by a first doped layer of InP or In.sub.0.53 GA.sub.0.47 As, a first barrier layer of Al.sub.x Ga.sub.1-x As.sub.y Sb.sub.1-y (0.ltoreq.x.ltoreq.1, y=0.51+0.05x), a well layer of InP or In.sub.z Ga.sub.1-z As (0.52.ltoreq.z.ltoreq.0.54), a second barrier layer of the AlGaAsSb, and a second doped layer of InP or In.sub.z Ga.sub.1-z As. The layers of the RTB structure are lattice-matched to InP.

Resonant tunnelling barrier structure device

A resonant tunneling semiconductor device having a large peak-to-valley current density J.sub.p /J.sub.v ratio comprises an InP substrate, a first contact compound semiconductor lattice-matched to Inp, a first barrier layer of (In.sub.0.52 Al.sub.0.48 As).sub.z (In.sub.0.53 Ga.sub.0.47 As).sub.1-z, (0&lt;z.ltoreq.1), a well layer of In.sub.1-y Ga.sub.y As, (0.48.gtoreq.y.gtoreq.0.46), a second barrier layer of (In.sub.0.52 Al.sub.0.48 As).sub.z -(In.sub.0.53 Ga.sub.0.47 As).sub.1-z, (0&lt;z.ltoreq.1), and a second contact layer compound semiconductor lattice-matched to InP:The first and second barrier layers and the well layer forming a quantum-well structure. Instead of the quantum-well structure above, it is possible to adopt the quantum-well structure of strained-layers comprising first and second barrier layers which are of In.sub.1-x Al.sub.x As (0.48&lt;x.ltoreq.1) and have a thickness of 0.5 to 10.0 nm.

Resonant tunneling semiconductor device

In order to make IC comprising high electron mobility semiconductor device, it is necessary to make the carrier in channel layer not to loose its high mobility by thermal treatment in the IC fabrication process. It has been found that the mobility of two dimensional electron gas (2DEG) is lost by scattering of ionized impurity diffused from doped layer into spacer layer which separates the 2DEG in channel layer from the doped layer. So another spacer (second spacer) is inserted between the spacer (first spacer) and the doped layer to prevent the diffusion of impurity. Proposed multilayered structure is as follows. A channel layer made of i-GaAs is formed on a high resistivity GaAs substrate. Upon which a first spacer layer (prior art) of undoped Al.sub.x Ga.sub.1-x As is formed, over which the second spacer layer of i-GaAs is formed, then over which the doped layer of n-Al.sub.x Ga.sub.1-x As is formed. The thickness of the second spacer layer is approximately 20 .ANG., and that of the first spacer is approximately 40 .ANG.. Applying such structure to the high electron mobility transistor, it could bear the heat treatment of 750.degree. C. 10 min. and more that 950.degree. C. 10 sec. annealing.

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Kawasaki, Japan

Tsuguo Inata