S-tec Corporation

Hgst Technologies Santa Ana, Inc.

Other

Tsan Lin Chen

In one aspect, the present disclosure provides a storage device for accounting for transmission errors to improve a usable life span of memory blocks. In some embodiments, the storage device includes: a memory array including a plurality of memory blocks; and a memory controller in communication with the memory array via an interface, wherein the memory controller is configured to detect an error event associated with data from one of the plurality of memory blocks; determine an origin of the error event; increment an error count if the origin of the error event indicates a data error in the one of the plurality of memory blocks and not if the origin of the error event indicates a transmission error; compare the error count to a threshold value; and mark the one of the plurality of memory blocks as bad when the error count exceeds the threshold value.

Transmission error detector for flash memory controller

Some embodiments of the disclosed subject matter include an integrated circuit. The integrated circuit includes a solid state device controller configured to control a plurality of flash memory devices, a first set of input output IO pads, coupled to the solid state device controller, arranged as a first pad ring around a perimeter of the integrated circuit, and a second set of IO pads arranged adjacent to at least one side of the first pad ring, wherein one of the second set of IO pads includes a power source node configured to receive a power supply voltage for the solid state device controller, a ground node, and a bond pad configured to receive an external signal.

Multi-layer pad ring for integrated circuit

Multi-layer input/output pad ring for solid state device controller

Systems and methods for auto-calibrating a storage memory controller are disclosed. In some embodiments, the systems and methods may be realized as a method for auto-calibrating a storage memory controller including instructing a controllable delay circuit to delay a read strobe signal at one of a plurality of delay settings, receiving data captured at a data latch using the delayed read strobe signal, selecting an adjustment factor from the plurality of delay settings using a multi-scale approach, based on an accuracy of the data captured at the data latch, and instructing the controllable delay circuit to delay the read strobe signal by the adjustment factor.

Systems and methods for auto-calibration of a storage memory controller

A flash memory controller includes a controllable delay circuit configured to receive a read strobe signal from a flash memory device and to delay the read strobe signal, a data latch, coupled to the controllable delay circuit, configured to receive the delayed read strobe signal, and to capture data from the flash memory device using the delayed read strobe signal, and a calibration circuit coupled to the controllable delay circuit, configured to instruct the controllable delay circuit to delay the read strobe signal at one of a plurality of delay settings, to receive the captured data from the data latch, to determine an accuracy of the captured data, and to determine an adjustment factor for the controllable delay circuit based on the accuracy of the data captured at the data latch.

Auto calibration of storage memory controller

A combining structure for toy blocks, forming a cross-shaped tenon on the top surface of a single unit block and mortises in the bottom surface of the single unit block, the unit blocks able to be combined together one by one inserting the tenon of a block in the mortises of another block.

Growing community of inventors

Zhubei, Taiwan

Tsan Lin Chen