Qunano Ab

Brainlit Ab

Truls Löwgren

Lars Samuelson

Jonas Ohlsson

Lars-Erik Wernersson

Tord Wingren

Erik Lind

Claes Thelander

Tomas Bryllert

The present invention relates to providing layers of different thickness on vertical and horizontal surfaces () of a vertical semiconductor device (). In particular the invention relates to gate electrodes and the formation of precision layers () in semiconductor structures comprising a substrate () and an elongated structure () essentially standing up from the substrate. According to the method of the invention the vertical geometry of the device () is utilized in combination with either anisotropic deposition or anisotropic removal of deposited material to form vertical or horizontal layers of very high precision.

Method of producing precision vertical and horizontal layers in a vertical semiconductor structure

The present invention relates to vertical nanowire transistors with a wrap-gated geometry. The threshold voltage of the vertical nanowire transistors is controlled by the diameter of the nanowire, the doping of the nanowire, the introduction of segments of heterostructures in the nanowire, the doping in shell-structures surrounding the nanowire, tailoring the work function of the gate stack, by strain engineering, by control of the dielectrica or the choice of nanowire material. Transistors with varying threshold voltages are provided on the same substrate, which enables the design of advanced circuits utilizing the shifts in the threshold voltages, similar to the directly coupled field logic.

Assembly of nanoscaled field effect transistors

Growing community of inventors

Malmö, Sweden

Truls Löwgren