Micron Technology Incorporated

Troy V Gugel

Scott E Sills

Adam L Olson

Paul D Shirley

Lijing Gou

Yoshiki Hishiro

Hiroyuki Mori

Sanh D Tang

John K Lee

Fred D Fishburn

Eugene A DeLaRosa

A method of lithographically patterning a substrate that has photoresist having removal areas and non-removal areas includes first exposing at least the non-removal areas to radiation effective to increase outer surface roughness of the photoresist in the non-removal areas at least post-develop but ineffective to change photoresist solubility in a developer for the photoresist to be cleared from the non-removal areas upon develop with the developer. Second exposing of radiation to the removal areas is conducted to be effective to change photoresist solubility in the developer for the photoresist to be cleared from the removal areas upon develop with the developer. The photoresist is developed with the developer effective to clear photoresist from the removal areas and to leave photoresist in the non-removal areas that has outer surface roughness in the non-removal areas which is greater than that before the first exposing. Other implementations and embodiments are contemplated.

Methods of lithographically patterning a substrate

Reducing or eliminating watermark-type defects during semiconductor device fabrication are described and can comprise treating photoresist using one of several embodiments. In some embodiments, the propensity for defect formation is reduced/eliminated by conditioning the photoresist surface through the application and removal of a sacrificial overcoat. In other embodiments, existing defects are reduced/eliminated by exposing the photoresist surface to a defect-stripping material during post-develop processing.

Method of reducing photoresist defects during fabrication of a semiconductor device

Methods for forming a redistribution layer on microfeature workpieces, and microfeature workpieces having such a redistribution layer are disclosed herein. In one embodiment, a method includes constructing a dielectric structure on a microfeature workpiece having a substrate and a terminal carried by the substrate, and removing a section of the dielectric structure to form an opening. The opening has a first portion extending through the dielectric structure and exposing the terminal and a second portion extending to an intermediate depth in the dielectric structure. The second portion is spaced laterally apart from the terminal. The method further includes forming a conductive layer on the microfeature workpiece with the conductive layer in electrical contact with the terminal and disposed in the first and second portions of the opening.

Microfeature workpieces and methods of forming a redistribution layer on microfeature workpieces

A method and apparatus for measuring registration between two or more integrated circuit layers is disclosed. Images of actual operative circuitry of different layers of a semiconductor wafer, obtained by an optical technique or a scanning electron microscope, are digitized and analyzed for the relative placement of pattern shapes of the corresponding layers. This relative placement is then compared to tolerance values and if out of tolerance misregistration of the two layers is indicated.

Method for measuring registration of overlapping material layers of an integrated circuit

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Meridian, ID, United States of America

Troy V Gugel