Motorola Corporation

Qualcomm Incorporated

Standard Microsystems Corporation

Rf Micro Devices, Inc.

Other

Gain Technology Corporation

Maxim Integrated Products, Inc.

Troy L Stockstad

Thomas D Petty

Robert L Vyne

Alexander Wayne Hietala

Renwin J Yee

Klaas Wortel

Ricardo Goncalves

Xinli Peng

Jade H Alberkrack

Joseph Dale Rutkowski

Luis Briones

Sandeep Chaman Dhar

Tracy Hall

Jefferson W Hall

Todd Robert Sutton

Roman Zbigniew Arkiszewski

Douglas Alan Garrity

Brett Christopher Walker

David K Lovelace

Iulian Mirea

Marko Harry Koski

Warren J Schultz

Eric Ian Mikuteit

Michael McGowan

Fares Jaoude

Mukesh Bansal

Baiying Yu

Ajay Kumar Kosaraju

Jin Wook Kim

Bing Liu

Nihit Bajaj

Martin J Brown

Yi-Cheng Wan

Matthew F Bacchi

Gianluca Valentino

Qadeer Khan

Ricardo T Goncalves

Techniques and apparatus for driving a transistor gate of a switched-mode power supply (SMPS) circuit. One example gate driver for a switching transistor of an SMPS circuit generally includes a first power supply rail; a reference rail; an output node for coupling to a control input of the switching transistor; a floating supply node; a pulldown transistor having a drain coupled to the output node of the gate driver and having a source coupled to the reference rail; and a pulldown logic buffer having a first power supply input coupled to the floating supply node, having a second power supply input coupled to the reference rail, and having an output coupled to a gate of the pulldown transistor. The floating supply node is configured to selectively receive power from the first power supply rail and the output node of the gate driver.

Gate driver having a floating supply node with selective power reception for use in switching converters

An apparatus is disclosed for harvesting ringing energy. In an example aspect, the apparatus includes a bootstrap circuit. The bootstrap circuit includes a bootstrap capacitor and a bootstrap switch. The bootstrap switch includes a first terminal configured to accept an input voltage. The bootstrap switch also includes a second terminal coupled to the bootstrap capacitor. The bootstrap switch additionally includes a body diode comprising an anode coupled to the first terminal and a cathode coupled to the second terminal. The bootstrap switch is configured to be in an open state to charge the bootstrap capacitor via the body diode. The bootstrap switch is also configured to provide a voltage at the second terminal of the bootstrap switch. The voltage is greater than an average of the input voltage.

Harvesting ringing energy using a bootstrap circuit

Features and advantages of the present disclosure include a switching regulator and current measurement circuit. In one embodiment, a switching transistor in the switching regulator has a first voltage on a first terminal and a switching voltage on a second terminal. A current measurement circuit has first and second input terminals. A first switch couples the second terminal of the switching transistor to the first terminal of the current measurement circuit when the switching transistor is on, where the second input terminal of the current measurement circuit is coupled to the first terminal of the switching transistor and measurement(s) may be taken. When the switching transistor is off, the first and second input terminals of the current measurement circuit are coupled together, and measurements emulate zero current through the switching transistor.

Current measurments in switching regulators

A circuit may include a control loop to regulate an output of the circuit and a headroom sensing circuit to produce a headroom sensing signal indicative of a headroom voltage of the circuit. The control loop may have a response characteristic that is set based on the headroom signal received from the headroom sensing circuit.

Adaptive stability control for a driver circuit

The present disclosure includes systems and methods for 100% duty cycle in switching regulators. A switching regulator circuit includes a ramp generator to produce a ramp signal having a period and a comparator to receive the ramp signal and an error signal, and in accordance therewith, produce a modulation signal. In a first mode of operation, the ramp signal increases to intersect the error signal, and in accordance therewith, changes a state of a switching transistor during each period of the ramp signal. In a second mode of operation, the error signal increase above a maximum value of the ramp signal, and in accordance therewith, the switching transistor is turned on for one or more full periods of the ramp signal.

Systems and methods for 100 percent duty cycle in switching regulators

In one embodiment, a circuit comprises a current source to produce current to a light emitting diode array. An analog dimming circuit generates a continuous control signal to the current source to control the current in the light emitting diode array according to a range of control signal values when the control signal is above a threshold. Below the threshold, a digital modulation circuit generates an additional modulated digital signal to the current source to control the current in the light emitting diode array according to a range of modulation values when the continuous control signal is below the threshold. The continuous control signal produces current from the current source into the light emitting diode array above a first value. The combination of the continuous control signal and the modulated digital signal produces current in the light emitting diode array below the first value.

Circuits and methods for controlling current in a light emitting diode array

A circuit for driving a load may include a control loop having a response characteristic. A headroom signal indicative of the headroom voltage of the circuit may set one or more parameters of the response characteristic. A load sign indicative of electrical loading on the circuit may further set the response characteristic.

A method and apparatus for derating current and for derating current for a camera flash. The method comprises monitoring a local junction temperature of a module. The local junction temperature is converted into a local junction current. The local junction current is then compared with a reference current, which is independent of temperature. After the current comparison and subtraction is made, a derate control current is obtained to generate the LED reference current. After the temperature crosses the temperature threshold, the derate control current is derated. Both the temperature threshold and current derate slope are programmable and precisely controlled. The LED output current is regulated and proportional to the LED reference current. If the local junction temperature is greater than the temperature threshold, the LED output current is derated at the moment of the camera flash to avoid thermal overload.

Method and apparatus for current derating with integrated temperature sensing

A method and apparatus for providing a temperature sensing loop used in connection with a current sensing component, such as a BATFET, in order to compensate for variations in the BATFET's resistance due to temperature variations. The temperature sensing loop detects a temperature of the BATFET and regulates the gate voltage of the BATFET based on the detected temperature in order to compensate for changes in the BATFET's resistance. The temperature sensing feedback loop maintains the BATFET at a constant resistance for current sensing through negative feedback control. The BATFET and temperature sensing loop can be provided as components of an on-chip fuel gauging application for a UE.

Method and apparatus for temperature adjusted control of BATFET current sensing

Circuitry for performing digital modulation is described. The circuitry includes a digital modulator. The digital modulator receives a first signal with a first duty cycle. The digital modulator also receives a second signal with a second duty cycle. The digital modulator further produces a monotonic multiplied modulated signal based on the first signal and the second signal.

Systems and methods for performing digital modulation

Systems and methodologies are described that facilitate calibration of the loop bandwidth of a phase-locked loop (PLL). Calibration for the loop bandwidth of a PLL as described herein can be performed by optimizing the loop response of the PLL. Optimization of the loop response of the PLL can be achieved by modifying the value of a feedback counter of the PLL to induce a loop response at the PLL. The loop response of the PLL can be measured and compared to an ideal loop response. Based on this comparison, appropriate adjustments can be made to the PLL. Further, various techniques described herein facilitate calibration of a PLL by adjusting only parameters of a charge pump of the PLL without requiring individual control mechanisms for each element of the PLL, thereby improving PLL performance and manufacturing yield.

PLL loop bandwidth calibration

Methods and apparatus for a switchable balun for combined BLUETOOTH&#xae; and WLAN operation. A switchable balun is provided that includes an input circuit for receiving an amplified signal, the input circuit comprising first and second coils connected at a center tap, an output circuit comprising a third coil that is inductively coupled to the first and second coils, the output circuit for outputting an adjusted version of the amplified signal for transmission in a selected transmission mode, and a switch coupled to the center tap, wherein the switch is configured to couple a first voltage to the center tap to select operation in a first transmission mode and to couple a second voltage to the center tap to select operation in a second transmission mode.

Methods and apparatus for a switchable balun for combined Bluetooth&#xae; and WLAN operation

A method for self testing a multiband voltage controlled oscillator (VCO) is described. A first frequency band in a VCO is selected. An N value is selected for a frequency divider that produces a tuning voltage for the VCO that is between a low tuning voltage limit and a high tuning voltage limit for the VCO. The N value is adjusted in one direction until the tuning voltage reaches one of the tuning voltage limits. This N value at the tuning voltage is a first limit value. The frequency bands are switched from the first frequency band to a second frequency band that is adjacent to the first frequency band.

Systems and methods for self testing a voltage controlled oscillator

A system and method for detecting and correcting over-current and/or over-voltage conditions in power amplifier circuitry in a transmit chain of a mobile terminal are provided. In general, over-current detection and correction circuitry combines a current detection signal indicative of a current provided to or drained by the power amplifier circuitry during ramp-up for a transmit burst and a substantially inverse current ramping profile to provide a first constant value. The first constant value is compared to a current threshold or limit value to determine whether an over-current condition exists. If an over-current condition exists, the over-current detection and correction circuitry operates to reduce the output power of the power amplifier circuitry during ramp-up for the transmit burst to correct for the over-current condition. In a similar manner, over-voltage detection circuitry operates to detect and correct over-voltage conditions during ramp-up for the transmit burst.

Excess current and saturation detection and correction in a power amplifier

A system and method for detecting and correcting excess current in a power amplifier in a transmit chain of a mobile terminal are provided. Over current detection and correction circuitry compares a current detection signal indicative of an output current of the power amplifier to a maximum current ramp during ramp-up for a transmit burst. If the current detection signal exceeds the maximum current ramp, then a power control signal controlling a supply voltage provided to the power amplifier circuitry is reduced, thereby reducing the output power and output current. Over voltage detection and correction circuitry compares a voltage detection signal indicative of an output voltage of the power amplifier to a maximum voltage ramp during ramp-up for the transmit burst. If the voltage detection signal exceeds the maximum voltage ramp, then the power control signal is reduced.

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Phoenix, AZ, United States of America

Troy L Stockstad