Delphi Technologies, Inc.

Troy Allan Chase

John Carl Christenson

Steven Edward Staller

Robert Lawrence Healton

John Emmett Freeman

James H Logsdon

David Boyd Rich

James Kingery

A method of processing a wafer, and particularly a cap wafer configured for mating with a device wafer in the production of a die package. Masking layers are deposited on oxide layers present on opposite surfaces of the wafer, after which the masking layers are etched to expose regions of the underlying oxide layers. Thereafter, an oxide mask is formed on the exposed regions of the oxide layers, but is prevented from forming on other regions of the oxide layers masked by the masking layers. The masking layers are then removed and the underlying regions of the oxide layers and the wafer are etched to simultaneously produce through-holes and recesses in the wafer. The oxide mask is then removed to allow mating of the cap wafer with a device wafer.

Encapsulation wafer process

A semiconductor wafer is etched to create an array of MEMS devices and at the same time, test sites having geometry which represent critical geometry of the MEMS devices. Probe contacts are provided in the test sites to permit measurement of resistance and capacitance between test site geometry as a way of determining the effectiveness of the etch. One test site comprises a ladder of semiconductor structures separated by gaps of graded width. Another test site comprises finger structures formed over a cavity and the probe contacts are located so as to detect inter-finger capacitance and resistance (or continuity) as well as intra-finger resistance.

Method and apparatus for electrically testing and characterizing formation of microelectric features

A process for forming a microelectromechanical system (MEMS) device by a deep reactive ion etching (DRIE) process during which a substrate overlying a cavity is etched to form trenches that breach the cavity to delineate suspended structures. In order to eliminate or at least reduce heat and/or charge accumulation that accelerates the DRIE etch rate of certain suspended structures, means are provided to electrically and/or thermally tie the suspended structures to each other and/or the surrounding bulk substrate. As a result, the process window is increased to allow slower-etching structures to be etched to completion without overetching the more rapidly-etched structures.

Deep reactive ion etching process and microelectromechanical devices formed thereby

A micro-electro-mechanical structure including a semiconductor layer mounted to an annular support structure via an isolation layer wherein the semiconductor layer is micromachined to form a suspended body having a plurality of suspension projections extending from the body to the rim and groups of integral projections extending toward but spaced from the rim between said suspension projections. Each projection in said groups has a base attached to the body and a tip proximate the rim. The structure includes a plurality of inward projections extending from and supported on the rim and toward the body. Each such projection has a base attached to the rim and a tip proximate the body; wherein the grouped projections and the inward projections are arranged in an interdigitated fashion to define a plurality of proximate projection pairs independent of the suspension elements such that a primary capacitive gap is defined between the projections of each projection pair. Also, a process is disclosed for fabricating the micro-electro-mechanical structure including the steps of removing a highly doped etch termination layer and thereafter etching through a lightly doped epitaxial layer to thereby define and release the structure.

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Kokomo, IN, United States of America

Troy Allan Chase