Texas Instruments Corporation

Intersect Technologies, Inc.

Tracy D Harmer

Curtis Howard Bruner

Stephen R Cornaby

A computer system () and method are presented for performing ECC corrections on data contained in a mass data storage device (). The computer system () has a host computer () having a CPU () and an associated mass data storage device (). At least some ECC hardware is associated with the mass data storage device (). A device driver () is associated with the host computer (), which includes software instructions for execution by the CPU () for performing at least some ECC functions or instructions on data read from the mass data storage device ().

ECC in computer system with associated mass storage device, and method for operating same

A computer system for storing data includes a host computer having system RAM associated with the computer system, and a file directory peripheral bus connected to the host computer. A mass memory storage peripheral computer device is connected to said peripheral bus, the mass memory storage peripheral computer device having access to the file directory to locate data on the mass memory storage peripheral computer device.

Buffering of partition tables, file system directory structures and individual file cluster chains in a mass storage device

An arrangement and method are disclosed herein for operating a computer system including a host computer having system RAM. The host computer uses a BIOS to control the operation of the system. The operation of the system requires the host computer to obtain the BIOS device and store the BIOS within the system RAM. The arrangement and method of the invention allows at least a portion of the BIOS to be stored within the mass memory storage of a mass memory storage peripheral computer device rather than being stored within ROM. The BIOS may be expansion BIOS associated with a particular peripheral computer device or system BIOS associated with the host computer.

STORING SYSTEM-LEVEL MASS STORAGE CONFIGURATION DATA IN NON-VOLATILE MEMORY ON EACH MASS STORAGE DEVICE TO ALLOW FOR REBOOT/POWER-ON RECONFIGURATION OF ALL INSTALLED MASS STORAGE DEVICES TO THE SAME CONFIGURATION AS LAST USE

An arrangement and method are disclosed herein for operating a mass memory storage peripheral computer device connected to a host computer. The host computer has system RAM associated with the host computer and is operated using an operating system and a system BIOS. The mass memory storage peripheral computer device is connected to the host computer using a peripheral bus in which relocatable expansion BIOS location addresses are allowed. The arrangement and method include a loadable device driver for controlling the operation of the mass memory storage peripheral computer device during the operation of the computer system. During the start-up of the computer system, the loadable device driver is loaded into the system RAM for use during the operation of the system. The loadable device driver allows the host computer to communicate with and control the operation of the mass memory storage peripheral computer device in a way which does not require the system BIOS or any other type of protocol translation mechanism to be provided between the loadable device driver and the operating system or the mass memory storage peripheral computer device in order for the loadable device driver to communicate with the operating system and the mass memory storage peripheral computer device.

Method and arrangement for operating a mass memory storage peripheral computer device connected to a host computer

A computer controlled system includes a data storage device connected to a host computer using a bus which allows device-initiated bus-mastering. The system has system RAM which is associated with the host computer and which is not part of the data storage device. The data storage device requires certain device operating data/code in the form of device control means and device operating data to be used to control the operation of the device. An arrangement and method for operating the data storage device includes storing at least a portion of the device operating data/code in the system RAM. The arrangement and method further include allowing the host computer and/or the data storage device access to the device operating data/code stored in the system RAM such that the host computer and/or the data storage device may use the device operating data/code to control the operation of the data storage device.

Method and arrangement for allowing a computer to communicate with a data storage device

An integrated circuit for use in a computer system having a host computer and at least one mass storage peripheral device has a controller circuit for the mass storage peripheral device for receiving information from the device and an interface circuit to interface the information from the device to the host computer via a bus mastering bus, such as a PCI bus, a 1394 bus, or the like, in the host computer. The integrated circuit is adapted to be located within the host computer and to interface to the peripheral device. The integrated circuit may include a portion of a read channel circuit, which is connected to receive information from the peripheral device. The integrated circuit may also contain other circuitry for the control and operation of the peripheral device, such as a digital signal processor, a buffer manager, a speed matching buffer, servo logic to control servo circuits to spin a motor of the peripheral device, or the like.

Integrated circuit for controlling a remotely located mass storage peripheral device

A mass storage peripheral device for use with a host computer has a rotating data medium with a motor arranged to rotate it. A sensor reads information from the medium, and a data preamplifier for amplifies the read information. An interface is connected between the mass storage peripheral device and the associated computer. The interface includes a data transmission path to conduct data signals from the data amplifier to a controller circuit for the peripheral device in the host computer. The mass storage peripheral device may also include a circuit path to receive motor control and drive signals from the host computer for operating the motor. The peripheral device may be adapted to receive motor control signals from a servo circuit, which is preferably located in the host computer and connected to the interface for operating the motor. A read channel circuit is connected to receive the amplified data signal, also may be located in the host computer.

Mass storage peripheral device with operating circuitry and programs located remotely therefrom

A computer system has a host computer and a mass storage peripheral device. The peripheral device is of the type having a computer readable medium, a sensor for detecting information on the medium, and a data amplifier for amplifying the information detected on the medium to produce an amplified data signal. An interface is provided between the mass storage peripheral device and the host computer. The computer system electronics is located wherein at least a controller circuit for the mass storage peripheral device is located in the host computer for receiving the information detected on the medium. The peripheral device may be, for example, a disk drive assembly, a hard disk drive assembly, a CD-ROM disk drive assembly, a DVD disk drive assembly, a floppy disk drive assembly, a high capacity floppy disk drive assembly, a miniature storage device, or the like. The mass storage peripheral device may be of the type that has a motor for rotating the medium, in which case, the servo circuitry may be located on the peripheral device, split between the peripheral device and host computer, or preferably, entirely contained in the host computer.

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Longmont, CO, United States of America

Tracy D Harmer