Schweitzer Engineering Laboratories, Inc.

Tracey G Windley

David E Whitehead

Tony J Lee

Zachary King Sheffield

Veselin Skendzic

Edmund O Schweitzer, Iii

Bogdan Zdzislaw Kasztenny

Armando Guzman-Casillas

Mangapathirao Venkata Mynam

Brian James Peterson

Taylor Joseph Blanc

A testing apparatus for imposing a traveling wave signal on an electric system signal for testing a fault detector is disclosed herein. The fault detector may be configured to simulate a fault at a particular location by controlling the timing of the traveling wave signal. The testing apparatus may be configured to impose multiple traveling wave signals to test the accuracy of the fault location determined by the fault detector. The testing apparatus may be configured to determine the calculation accuracy of the fault detector. The testing apparatus may impose a traveling wave signal on a signal simulating an electrical signal on an electric power delivery system. The testing apparatus may be used to test capabilities of a fault detector of detecting a fault using traveling waves or incremental quantities.

Testing system for traveling wave fault detectors

According to various embodiments, an intelligent electronic device IED, such as a protective relay, includes a universal binary input circuit for receiving an AC or DC binary input with a voltage magnitude between approximately 0 Volts and 300 Volts. The universal binary input provides reinforced isolation via an input protection subcircuit and an optocoupler for communicating an optical signal with an electrically isolated controller based on the received binary input signal. In one embodiment, a duty cycle modulation subcircuit generates a pulse width modulated drive signal to drive the optocoupler based on the voltage magnitude of the received binary input. The duty cycle of the pulse width modulated drive signal is (linearly or nonlinearly) inversely proportional to the voltage magnitude of the received binary input.

Duty cycle modulated universal binary input circuit with reinforced isolation

A testing system for imposing a traveling wave signal on an electric power system signal for testing a fault detector is disclosed herein. The testing system may be configured to simulate a fault at a simulated location by controlling the timing of the traveling wave signal. The testing system may be configured to impose multiple traveling wave signals to test the accuracy of the fault location determined by the fault detector. The testing system may be configured with multiple testing apparatuses using time coordination and referenced to an intended fault instant. The testing system may be configured to supply traveling waves of different polarities to test for different fault type detection.

The present disclosure pertains to systems and methods for monitoring a plurality of analog-to-digital converters. In one embodiment, a plurality of input channels may each be in communication with a different phase of a three-phase electric power delivery system. The input channels may be configured to receive analog signals from the different phases. A composite signal subsystem may be configured to generate a composite signal based on the plurality of input channels. An analog-to-digital converter subsystem may be configured to produce a digitized representation of each of the plurality of input channels and a digitized representation of the composite signal. An analog-to-digital converter monitor subsystem may identify an error in the analog-to-digital conversion based on the digitized representation of the composite signal and the digitized representations of the plurality of input channels.

Supervision of input signal channels

Disclosed herein are various implementations of input-controlled multiple threshold debounce circuits or algorithms. In one embodiment, an input-controlled multiple threshold debounce system is configured to receive an input signal and to control an output. An analysis subsystem may determine when an input signal exceeds an assertion threshold and may assess at least one additional characteristic of the input signal. Supervisory logic in communication with the analysis subsystem may select a variable delay based on the at least one additional characteristic of the input signal. A delay subsystem controlled by the supervisory logic may assert a first signal after the input signal remains above the assertion threshold for longer than the variable delay. Finally, a system output may be configured to receive the first signal and may be configured to assert the debounce system output based on the first signal.

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Moscow, ID, United States of America

Tracey G Windley