Fujitsu Corporation

Toyoo Miyajima

Toshihiro Ohki

Shirou Ozaki

Kenji Imanishi

Kozo Makiyama

Naoya Okamoto

Yuichi Minoura

Masahito Kanamura

Toshihide Kikkawa

Norikazu Nakamura

Keiji Watanabe

Atsushi Yamada

Seiki Sakuyama

Kozo Shimizu

Masayuki Takeda

Tadahiro Imada

Mineharu Tsukada

Sanae Shimizu

Yasutoshi Kotaka

A method of manufacturing a semiconductor device includes forming a barrier metal film on a surface of at least one of a first electrode of a wiring board and a second electrode of a semiconductor element, providing a connection terminal between the first and second electrodes, the connection terminal being made of solder containing tin, bismuth and zinc, and bonding the connection terminal to the barrier metal film by heating the connection terminal and maintaining the temperature of the connection terminal at a constant temperature not lower than a melting point of the solder for a certain period of time.

Semiconductor device having connection terminal of solder

A semiconductor device includes a first semiconductor layer formed over a substrate, a second semiconductor layer formed over the first semiconductor layer, a source electrode and a drain electrode formed over the second semiconductor layer, an insulating film formed over the second semiconductor layer, a gate electrode formed over the insulating film, and a protection film covering the insulating film, the protection film being formed by thermal CVD, thermal ALD, or vacuum vapor deposition.

Semiconductor device

Method of manufacturing semiconductor device capable of enhancing bonding strength between connection terminal and electrode

A semiconductor device, comprising: a first semiconductor layer disposed on a substrate; a second semiconductor layer disposed on the first semiconductor layer; a lower insulating film disposed on the second semiconductor layer; a p-type electroconductive oxide film disposed on the lower insulating film; an upper insulating film disposed on the oxide film; and a gate electrode disposed on the upper insulating film, wherein the lower insulating film under the gate electrode has a depressed portion.

A compound semiconductor device includes a compound semiconductor laminated structure, a passivation film formed on the compound semiconductor laminated structure and having a through-hole, and a gate electrode formed on the passivation film so as to plug the through-hole. A grain boundary between different crystalline orientations is formed in the gate electrode, and a starting point of the grain boundary is located apart from the through-hole on a flat surface of the passivation film.

Compound semiconductor device and manufacturing method therefor

An HEMT includes, on an SiC substrate, a compound semiconductor layer, a silicon nitride (SiN) protective film having an opening and covering the compound semiconductor layer, and a gate electrode formed on the compound semiconductor layer so as to plug the opening. In the protective film, a projecting portion projecting from a side surface of the opening is formed at a lower layer portion

A compound semiconductor device includes: a substrate; an electron transit layer formed over the substrate; an electron supply layer formed over the electron transit layer; and a buffer layer formed between the substrate and the electron transit layer and including AlGaN(0&#x2266;x&#x2266;1), wherein the x value represents a plurality of maximums and a plurality of minimums in the direction of the thickness of the buffer layer, and the variation of x in any area having a 1 nm thickness in the buffer layer is 0.5 or less.

Compound semiconductor device and method of manufacturing the same

A semiconductor device may include a first semiconductor layer formed on a substrate, a second semiconductor layer formed on the first semiconductor layer, a source electrode and a drain electrode in contact with the first semiconductor layer or the second semiconductor layer, an opening formed in the second semiconductor layer, an insulating film formed on an inner surface of the opening formed in the second semiconductor layer and above the second semiconductor layer, a gate electrode formed in the opening via the insulating film, and a protective film formed on the insulating film and including an amorphous film containing carbon as a major component.

Semiconductor device and method of fabricating the semiconductor device

Compound semiconductor device and manufacturing therefor

A compound semiconductor multilayer structure is formed on a Si substrate. The compound semiconductor multilayer structure includes an electrode transit layer, an electrode donor layer formed above the electron transit layer, and a cap layer formed above the electron donor layer. The cap layer contains a first crystal polarized in the same direction as the electron transit layer and the electron donor layer and a second crystal polarized in the direction opposite to the polarization direction of the electron transit layer and the electron donor layer.

Compound semiconductor device and method for fabricating the same

A compound semiconductor device includes: an electron transport layer formed over a substrate; an electron supply layer formed over the electron transport layer; and a cap layer formed over the electron supply layer; the cap layer includes a first compound semiconductor layer containing GaN; a second compound semiconductor layer containing AlN, which is formed over the first compound semiconductor layer; a third compound semiconductor layer containing GaN, which is formed over the second compound semiconductor layer; and at least one of a first AlGaN-containing layer and a second AlGaN-containing layer, with the first AlGaN-containing layer formed between the first compound semiconductor layer and the second compound semiconductor layer and the Al content increases toward the second compound semiconductor layer, and the second AlGaN-containing layer formed between the second compound semiconductor layer and the third compound semiconductor layer and the Al content increases toward the second compound semiconductor layer.

A magneto-resistive effect element is provided with a first soft magnetic layer, a magneto-resistive effect film formed directly on the first soft magnetic layer. and a second soft magnetic layer formed on the magneto-resistive effect film. The magneto-resistive effect element is configured as allowing electric current to flow in the thickness-wise direction. The first soft magnetic layer is composed of columnar crystals. The magneto-resistive effect film has an anti-ferromagnetic layer. The anti-ferromagnetic layer is formed directly on the first soft magnetic layer.

Magneto-resistive effect element magnetic disk device having magneto-resistive effect film and method of forming a CPP-type magneto-resistive effect element having a soft magnetic layer composed of columnar crystal

A method of evaluating an element that includes the step of preparing a thin evaluation sample including a first portion in which a first layer containing a first material and a second layer containing a second material are laminated, a second portion containing the first material, and a third portion containing the second material; and calculating the thickness of the first layer in the first portion.

Growing community of inventors

Isehara, Japan

Toyoo Miyajima