Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Matsushita Electronics Corporation

Toyoji Ito

Eiji Fujii

Yoshihisa Nagano

Kazuo Umeda

Takumi Mikawa

Akihiro Matsuda

Toru Nasu

Keisuke Tanaka

Toshie Kutsunai

Yasufumi Izutsu

Keisaku Nakao

Satoshi Nakagawa

Atsushi Noma

Hiroshi Yoshida

Yoji Bito

Sadayuki Imanishi

A method includes the steps of: forming a first insulation film on a substrate; forming a hole in the first insulation film; forming a lower electrode on a bottom surface and a sidewall surface of the hole; forming a capacitor insulation film on the lower electrode; forming a second conductive layer on the capacitor insulation film; forming a second insulation film on the second conductive layer so that the second insulation film fills a recess corresponding to the hole; forming a resist mask on the second insulation film so that the resist mask covers the recess; patterning the second insulation film by using the resist mask; and patterning the second conductive layer and the capacitor insulation film by using the patterned second insulation film as a hard mask. By dry etching using a hard mask, a dielectric capacitor having a three-dimensionally stacked structure can be formed with a high yield.

Method for manufacturing dielectric memory

A semiconductor memory device includes: a first conductive layer; a second conductive layer; a first insulating film; a first plug; a second plug; a second insulating film having a first opening and a second opening; a first metal film; a second metal film; a first capacitor insulating film formed on the first metal film; a second capacitor insulating film formed on the second metal film; and a third metal film. The second metal film is formed so that an end thereof located away from the first opening extends onto the top surface of the second insulating film. The second metal film is connected at its extending portion to the third metal film.

Ferroelectric device having a contact for taking the potential of a metal film and a plurality of capacitors positioned periodically

A semiconductor device includes: a lower hydrogen-barrier film; a capacitor formed on the lower hydrogen-barrier film and including a lower electrode, a capacitive insulating film, and an upper electrode; an interlayer dielectric film formed so as to cover the periphery of the capacitor; and an upper hydrogen-barrier film covering the top and lateral portions of the capacitor. An opening, which exposes the lower hydrogen-barrier film where the lower hydrogen-barrier film is located around the capacitor, and which is tapered and flares upward, is formed in the interlayer dielectric film, and the upper hydrogen-barrier film is formed along the lateral and bottom faces of the opening, and is in contact with the lower hydrogen-barrier film in the opening.

Semiconductor device and method for fabricating the same

A semiconductor device includes: a conductive plug formed through an insulating film; a conductive oxygen barrier film formed on the insulating film so as to be electrically connected to the conductive plug and to cover the conductive plug; a lower electrode formed on the oxygen barrier film and connected to the oxygen barrier film; a capacitive insulating film formed on the lower electrode, following the lower electrode; and an upper electrode formed on the capacitive insulating film, following the capacitive insulating film. The capacitive insulating film has a bent portion that extends along the direction in which the conductive plug penetrates through the insulating film.

A semiconductor device is composed at least of a memory circuit part having capacitors and a peripheral circuit part for controlling the memory circuit part and has a first hydrogen barrier film of hydrogen resistance covering a region in which the capacitors are formed and a second hydrogen barrier film of hydrogen resistance covering at least the memory circuit part and the peripheral circuit part above the first hydrogen barrier film. The second hydrogen barrier film covers a region of the semiconductor device located between an interconnect layer above the first hydrogen barrier film and closest to the capacitors and the first hydrogen barrier film except for a region thereof in which a contact plug is formed.

Semiconductor device

A method for fabricating a semiconductor device has the steps of forming a conductive film on a substrate, forming an insulating film such that the conductive film is covered with the insulating film, forming, in the insulating film, a hole having a bottom portion not reaching the conductive film by using a mask layer having a first opening pattern, and forming, in the insulating film, an opening for exposing the conductive film by using a mask layer having a second opening pattern having an opening diameter larger than an opening diameter of the first opening pattern. An obtuse angle is formed between a wall surface of the opening and a bottom surface of the opening.

Method for fabricating semiconductor device

A capacitormade up of a lower electrodea capacitive insulating filmof an insulating metal oxide and an upper electrodeis formed over a semiconductor substrateA first-layer wireis formed on a passivation filmthat covers the capacitorA first interlevel dielectric filmis deposited to cover the first-layer wireA second interlevel dielectric filmis deposited over the first interlevel dielectric filmwith a barrier filmwhich overlaps the capacitorfor preventing hydrogen from diffusing, interposed therebetween. A second-layer wireis formed on the second interlevel dielectric filmThe first interlevel dielectric filmhas a hydrogen content lower than that of the second interlevel dielectric film

Semiconductor device including a capacitor having a capacitive insulating film of an insulating metal oxide

A capacitor element includes a lower electrode, a ferroelectric film, and an upper electrode that are formed on a substrate. In the capacitor element, the ferroelectric film is formed by a reaction rate-determining method, and the lower electrode has a thickness of not more than 100 nm, and variation of the thickness of not more than 10%. With this, a capacitor element in which the composition variation of the ferroelectric film is suppressed, and a method for producing the same, are provided.

Capacitor element and production thereof

The semiconductor device of the invention includes a capacitor device, which is formed on a substrate and which includes a capacitive lower electrode, a capacitive insulating film made of an insulating metal oxide film and a capacitive upper electrode. An interlevel insulating film having an opening reaching the capacitive upper electrode is formed over the capacitor device. A metal interconnection including a titanium film is formed over the interlevel insulating film so as to be electrically connected to the capacitive upper electrode through the opening. An anti-diffusion film having conductivity is formed between the capacitive upper electrode and the metal interconnection for preventing titanium atoms composing the titanium film of the metal interconnection from passing through the capacitive upper electrode and diffusing into the capacitive insulating film.

First, a capacitor device including a capacitor dielectric film of a metal oxide is formed on a substrate. Subsequently, an interlayer insulating film of an oxide is deposited on the capacitor device, an opening is formed in a region of the interlayer insulating film disposed above the capacitor device, and then, a conducting film connected to the capacitor device through the opening is formed so as to expose a portion of the interlayer insulating film disposed above a periphery of the capacitor device. During a convey time when the substrate on which the conducting film has been formed is being conveyed to a subsequent step or during a wait time before or after conveying the substrate to the subsequent step, the substrate on which the conducting film has been formed is contained in a container an atmosphere within which has a lower moisture concentration than the ambient atmosphere until a substantially whole top face of the interlayer insulating film is covered with another member.

First, a pattern of electrodes or interconnects is formed on a semiconductor substrate. Next, a first insulating film, which will be dry-etched at a relatively high rate and exhibit relatively high planarity, is deposited over the substrate as well as over the pattern. Subsequently, a second insulating film, which will be dry-etched at a relatively low rate and exhibit relatively low planarity, is deposited over the first insulating film. Thereafter, a multilayer structure, including a ferroelectric film, is formed on the second insulating film and then dry-etched and patterned, thereby forming an electronic device out of the multilayer structure.

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Shiga, Japan

Toyoji Ito