Kabushiki Kaisha Toshiba

Toshiba Electronic Devices & Storage Corporation

Mitsubishi Denki Kabushiki Kaisha

Toyoaki Uo

Hiroaki Ishihara

Tsuneo Suzuki

Shigeyuki Sakura

Junichi Nakagawa

Masaki Noda

Atsushi Iwata

Masamichi Nogami

Hiroaki Shimizu

Masayuki Sugizaki

Yuichi Tagami

Tatsuhiko Maruyama

Yuta Kugiyama

Hisami Saitou

Yoshitaka Murasaka

Toshifumi Imamura

According to the present embodiment, a power supply circuit includes a first transistor, a feedback voltage generation circuit, a first voltage generation circuit, and a protection circuit. The first transistor is connected between an input terminal and an output terminal. The feedback voltage generation circuit divides the output voltage to generate a feedback voltage. The first voltage generation circuit supplies a voltage to a first control terminal of the first transistor via a first node based on the feedback voltage and a reference voltage. The protection circuit outputs a voltage that makes the first transistor non-conducting or places the first transistor in a state where the first transistor has a predetermined high resistance value to the first control terminal, when the input voltage increases above a first threshold voltage within a predetermined time.

Power supply circuit having protection circuit against electrostatic discharge stress and semiconductor device having the power supply circuit

According to one embodiment, a communication device includes first and second substrates. The first substrate includes an input circuit and a modulation circuit. The second substrate includes a receive circuit and an output circuit. The modulation circuit includes at least one delay circuit, outputs a modulated signal if an input signal has a first logic level, and using the at least one delay circuit, adjusts a length of a period to output the modulated signal shorter or longer than a period when the input signal has the first logic level. The receive circuit receives an electrical signal based on the modulated signal and demodulates the electrical signal. The output circuit outputs an output signal based on the electrical signal demodulated by the receive circuit.

Communication device

According to one embodiment, there is provided a detection circuit including a first insulating element, a second insulating element, a first transmission test circuit, a second transmission test circuit, and a reception test circuit. The first transmission test circuit is connected to the first insulating element. The second transmission test circuit is connected to the second insulating element. The reception test circuit is connected to each of the first insulating element and the second insulating element to output a detection signal corresponding to a difference between a voltage of the first insulating element and a voltage of the second insulating element.

Detection circuit and communication system

According to one embodiment, there is provided a magnetic coupling device including a first coil, a second coil, a third coil, a fourth coil, a first constant-potential node and a second constant-potential node. The second coil is electrically connected with one end of the first coil and wound in a direction opposite to a direction in which the first coil is wound. The third coil faces the first coil. The fourth coil faces the second coil. The first constant-potential node is electrically connected with one end of the third coil. The second constant-potential node is electrically connected with one end of the fourth coil.

Magnetic coupling device and communication system

A communication device according to an embodiment includes an oscillator, a first signal generation circuit, a first insulation element, a first receiving circuit, and a first output circuit. The oscillator is configured to output a first carrier signal when at least one of a plurality of input signals that are externally input is at a first logic level. The first carrier signal and a first input signal among the input signals are input to the first signal generation circuit. The first signal generation circuit is configured to generate a first signal when the first input signal changes from a second logic level to the first logic level, output a first modulated signal based on the first signal, and thereafter output a second modulated signal based on the first carrier signal.

An optical coupling device includes a power lead with a first portion and a power line portion. A light-emitting element is disposed on the first portion. A ground lead includes a ground line portion and a second portion with a drive circuit disposed thereon. A first input frame in the device includes a first input terminal portion and a first input signal line portion. A second input frame in the device includes a second input terminal portion and a second input signal line portion. The first and second input frames are adjacent to each other and a minimum distance from the first input signal line portion to the first installation portion is greater than a minimum distance from the first input signal line portion to the power line portion.

Optical coupling device having a drive circuit on a ground frame to drive a light emitting element on a power frame

A light receiving circuit includes a light receiving element, a first transistor that includes a control terminal which is connected to the light receiving element through a first node, a first terminal and a second terminal, a first load circuit that is connected between a power supply potential and a second node connected to the second terminal, and outputs a voltage signal to a third node, wherein the voltage signal is based on a current signal in the light receiving element, a first feedback resistor that is connected between the first node and the third node, a first limiter circuit that is connected in parallel with the first feedback resistor, and limits an increase of voltage at both ends of the first feedback resistor, and a first circuit that is connected between the second node and the reference potential, includes a second transistor which is diode-connected.

Light receiving circuit and light coupling device

A clock regeneration circuit includes: a signal input terminal; a D flip-flop circuit; a reset signal generation circuit; a delay circuit; a comparator; a first capacitor; and a feed back circuit. The signal input terminal is inputted with a pulse width modulation signal. The D flip-flop circuit includes a clock terminal, an output terminal, and a reset terminal. The reset signal generation circuit is configured to input a reset signal generated in synchronization with the pulse width modulation signal to the reset terminal at a first time. The delay circuit is configured to delay the pulse width modulation signal. The feedback circuit includes a current source having a control terminal. The feedback circuit is configured to change one of charge rise time and discharge fall time in response to the signal of the comparator to control duty cycle of the signal of the comparator.

Clock regeneration circuit, light receiving circuit, photocoupler, and frequency synthesizer

According to an embodiment, a semiconductor device includes an analog/digital conversion unit, a pulse width modulation unit outputting a transmission signal, the transmission signal being a pulse pattern corresponding to a digital signal output from the analog/digital conversion unit, a reference signal generation unit generating a reference signal, the reference signal being a fixed pulse pattern. The device includes a first control unit selecting one of the transmission signal and the reference signal, a light emitting element drive unit outputting a drive current based on the transmission signal or the reference signal, a light emitting element driven by the light emitting element drive unit. The device includes an optical receiving unit converting the optical signal into a voltage signal, and a demodulation unit demodulating the voltage signal into a digital signal based on the transmission signal or the reference signal.

Semiconductor device, method for testing same and transmitting circuit

According to one embodiment, an optically coupled insulating device includes an optical transmitter and an optical receiver. The optical transmitter includes an analog-to-digital converter, an encoder, a transmitting controller, and an electrooptical transducer. The encoder is configured to generate a transmitting signal by superimposing an output of the analog-to-digital converter onto a signal based on a clock signal. The transmitting signal is encoded to have an average duty ratio of more than zero and less than one. The transmitting controller is configured to output one of the transmitting signal and the output of the analog-to-digital converter depending on an input level of the analog signal. The electrooptical transducer is configured to convert an output of the transmitting controller into an optical signal. The optical receiver includes an optoelectrical transducer, a decoder, and a receiving controller.

Optically coupled insulating device

According to one embodiment, a lock detection circuit includes an initial state response circuit. The initial state response circuit is configured to output a third control signal to delay lines and cause a charge pump to stop an output of a second control signal when a pulse width modulation signal is not input, the third control signal is configured to control a delay amount to cause a delay amount of an entire delay circuit to be within one selected from a range in which an OVER signal generation circuit is operable, a range in which an UNDER signal generation circuit is operable, and a range that is greater than an UNDER threshold and less than an OVER threshold.

Lock detection circuit, DLL circuit, and receiving circuit

Optical transmitter, optical receiver, and optically coupled insulating device

An analog-to-digital converter includes a first switch circuit, a first integrator, a second switch circuit, a second integrator, a quantizer and a digital-to-analog converter. The first switch circuit receives an external analog signal, outputs the analog signal in reverse phase, and outputs the analog signal in positive phase. The first integrator receives and integrates the analog signal with cross-coupling. The second switch circuit outputs an output of the first integrator and a common mode output potential of the first integrator. The second integrator samples and integrates an output of the second switch circuit. The quantizer single-bit-quantizes an output of the second integrator to provide the output as a digital signal output. The digital-to-analog converter receives an output of the quantizer and provides the output as an analog signal output. Each of the first and second integrators receives and integrates an output of the digital-to-analog converter with cross-coupling.

Growing community of inventors

Kanagawa-ken, Japan

Toyoaki Uo