Matsushita Electric Industrial Co., Ltd.

Toshiyuki Yokoyama

Akira Motohara

Makoto Fujiwara

Miwaka Takahashi

Katsuya Fujimura

Masanobu Mizuno

Kentaro Shiomi

Hiroshi Takahashi

Masahiro Ohashi

Michiaki Muraoka

Kasumi Hamaguchi

Sadashige Sugiura

An encryption process is employed in the LSI design so as to improve confidentiality of the circuit design data over conventional examples. In the encryption process, confidential circuit design data is encrypted to produce encrypted design data and a cipher key. The encrypted design data is provided to the user who conducts a design/verification process. The key is also provided as required. In the design/verification process, the encrypted design data is subjected to various processes without disclosing the contents of the original circuit. In a decoding process, the encrypted design data subjected to the design/verification process is decoded to produce original circuit design data.

LSI design method and verification method

The present invention provides a semiconductor device, in which a plurality of chip IPs are mounted onto a common semiconductor circuit board, an evaluation method for the same, and a function setting method for the same. Various IP groups can be mounted as chip IPs onto a silicon circuit board. The silicon circuit board includes a silicon substrate, a wiring layer and pads. IPs (chip IPs) are mounted onto the pads by lamination. Means for selecting, switching and setting the functions of the IPs are provided, making the semiconductor device suitable for small-variety mass-production.

Semiconductor device, function setting method thereof, and evaluation method thereof

Information about an exclusive operation among a plurality of blocks and interconnection information about a sharable resource within each of these blocks are defined. Based on the sharable resource information and the inter-block exclusive operation information, a resource sharable among the blocks is extracted. Module specifications, in which information about interfaces, power dissipation, operation models and top-level hierarchy interconnection is stored, exclusive operation information describing an exclusive operation rule among the blocks, and prioritized function information used for preventing respective functions from being enabled at the same time are input to an generator, which is an automatic generating tool. In this manner, a power and clock management module for use in power save management, a wrapper bank select module storing interconnection information, a shared resource module storing information about a sharable resource and an optimized top-level hierarchy module storing interconnection information about an optimized top-level hierarchy are generated. Downsizing and power saving are realized by resource sharing and power management.

Method for designing integrated circuit device

A database for design of an integrated circuit device having data stored therein in a flexibly utilizable state, and a method for designing an integrated circuit device using such a database. A virtual core database (VCDB) for storing design data and a VCDB management system (VCDBMS) as a control system are provided. The VCDB includes virtual core (VC) clusters, test vector clusters, and purpose-specific function testing models. The VCDB also includes a system testing database having shared test clusters and peripheral model clusters. The VCDBMS includes a function testing assist section for generating test scenarios, the purpose-specific function testing models, system testing models, and the like, a VC interface synthesis section, and the like.

Database for design of integrated circuit device and method for designing integrated circuit device

The method for designing an integrated circuit device of the present invention includes the steps of: obtaining the number of operations by a functional simulation; determining a specification model based on the number of operations; determining an behavioral model corresponding to the specification model based on the number of operations per cycle required; determining a RTL model corresponding to the behavioral model based on the number of operations per cycle required; and obtaining design data corresponding to the RTL model for implementing the function.

Method of designing integrated circuit device using common parameter at different design levels, and database thereof

A function information storage section of each of a plurality of IPs of a device stores a plurality of sets of correlations between the working voltage V and the processing time T required when operated at this voltage. The device also includes a system controller for controlling the operation of each IP. When the voltage exceeds a limitation at a certain time as a result of analysis, the working voltage of each IP is changed to fall within the limitation.

Semiconductor integrated circuit device and control method therefor

A database, in which data is stored in a flexibly usable state, is provided for use in the design of an integrated circuit device, and a method for designing an integrated circuit device using such a database is also provided. A design environment includes: a virtual core database (VCDB), which is hierarchical design data storage; and a virtual core database management system (VCDBMS) as a control system. The VCDB includes architecture information and a VC cluster. The VC cluster includes: a specification VC for storing therein data at a specification level; an architecture VC for storing therein data at an architectural level; an RTL-VC for storing therein data at a register transfer level; and a performance index used for evaluating the performance of the respective VCs. By providing these VCs for respective layers, new VCs can be generated, data within the VCs can be modified and instances can be generated at the respective levels. As a result, the data can be used flexibly and recycled as well.

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Kyoto, Japan

Toshiyuki Yokoyama