Seiko Instruments Inc

Ablic Inc.

Sii Semiconductor Corporation

Toshiyuki Tsuzaki

Manabu Fujimura

Masakazu Sugiura

Michiyasu Deguchi

Yuji Shiine

Fumiyasu Utsunomiya

Kiyoshi Yoshikawa

Osamu Uehara

Tadashi Kurozo

Hiroyuki Masuko

Akira Takeda

Hiroki Wake

Provided is a differential amplification device reduced in DC offset voltage. The amplification device amplifies an input signal, and includes a chopper switch circuit which switches the polarity of the input signal between a normal phase and a reverse phase and outputs the input signal, a V-I conversion circuit which is connected to the chopper switch circuit, a capacitance circuit which is connected to the V-I conversion circuit to store electric charges supplied from the V-I conversion circuit, and an amplification circuit which is connected to the V-I conversion circuit to switch the polarity of an input signal between the normal phase and the reverse phase and amplify the input signal.

Differential amplification device

Provided is a voltage regulator capable of stably suppressing overshoot. The voltage regulator includes a non-regulated state detection circuit for detecting a non-regulated state, and an overshoot suppression circuit. The overshoot suppression circuit is configured to operate when the non-regulated state detection circuit detects the non-regulated state.

Voltage regulator including a non-regulated state detection circuit

Provided are an amplifier circuit capable of reducing DC offset voltage without an increase in chip area and degradation in frequency characteristics, and a multipath nested miller amplifier circuit. The amplifier circuit includes a chopper switching circuit, a sampling circuit configured to sample an output signal from the chopper switching circuit, and a holding circuit configured to hold a signal output from the sampling circuit.

Amplifier circuit and multipath nested miller amplifier circuit

To provide a current detection circuit which suppresses a change in characteristics of a PMOS transistor on the non-inversion input terminal side of a differential amplifier due to NBTI and causes no change in threshold value at which an output voltage of the current detection circuit is inverted. A voltage limiting circuit which limits a voltage drop is provided between a non-inversion input terminal of a differential amplifier and a source of a PMOS transistor on the inversion input terminal side.

Current detection circuit

Provided is a voltage regulator in which an output current can be controlled stably and accurately to an overcurrent protection set value without the need of providing a phase compensation circuit including an element having a large area. The voltage regulator includes a constant voltage control circuit including: a first differential amplifier circuit for comparing a first reference voltage and a feedback voltage to each other; and an output transistor to be controlled by an output voltage of the first differential amplifier circuit, and an overcurrent protective circuit including: a resistor for measuring the output current; a second differential amplifier circuit for measuring a difference between voltages at both terminals of the resistor; a comparator for comparing an output voltage of the second differential amplifier circuit and a second reference voltage to each other; and a switch to be controlled by a detection signal of the comparator. When the output current equal to or larger than an overcurrent protection set value flows, the output voltage of the second differential amplifier circuit is input to the first differential amplifier circuit via the switch, to thereby switch control of the output transistor from control based on the constant voltage control circuit to control based on the overcurrent protective circuit.

Voltage regulator

There is provided an operational amplifier capable of detecting that an input terminal has been open circuited without restricting the voltage range of an input signal. The operational amplifier includes a first comparator which detects that an inverting input terminal of an operational amplifier has been open circuited, a second comparator which detects that a non-inverting input terminal of the operational amplifier has been open circuited, a first resistor and a first switch which are controlled by output signals of the first comparator and the second comparator and which are connected in series between the non-inverting input terminal and a ground terminal of the operational amplifier, and a second resistor and a second switch which are connected in series between the inverting input terminal and a supply terminal of the operational amplifier.

Operational amplifier

Provided is a differential amplifier circuit with a small circuit size. When a differential voltage (Vinp&#x2212;Vinn) is higher than a predetermined voltage, a PMOS transistor () is turned ON. At this time, a current source () is connected in parallel to a current source (), and the current source () supplies a drive current to a differential amplifier circuit (). In other words, the current sources (and), rather than only the current source (), supply a total current (I+I) to the differential amplifier circuit () as the drive current. Accordingly, a slew rate of an output voltage (Vout) is increased. Two PMOS transistors and the current source () are simply required for controlling the slew rate of the output voltage (Vout), and hence the differential amplifier circuit () is small in circuit size.

Differential amplifier circuit

A Provided is a differential amplifier in which a current flowing into an output transistor may be adjusted to a constant value even when a voltage of a non-inverting input terminal changes. A current flowing through the differential amplifier circuit is controlled by a current source, a current value of which is changed depending on the voltage of the non-inverting input terminal.

Differential amplifier

Provided is an operational amplifier capable of correcting an offset voltage of an element to be connected to an input terminal. The operational amplifier includes a main amplifier and an offset correction amplifier, which include input terminals connected in common. The main amplifier includes: a first transconductance amplifier for measurement; a second transconductance amplifier for offset correction; and a first capacitor connected to an input terminal of the second transconductance amplifier. The offset correction amplifier includes: a third transconductance amplifier for measurement; a fourth transconductance amplifier for offset correction; and a second capacitor connected to one input terminal of the fourth transconductance amplifier. An offset voltage adjustment circuit is provided to another input terminal of the fourth transconductance amplifier included in the offset correction amplifier.

Provided is a power supply switching circuit capable of efficiently supplying a desired voltage among a plurality of voltages to a load. In the case of a P-type semiconductor substrate, N-type MOS transistors are provided between a load and an AC adapter and between the load and a battery, and hence no parasitic diode exists between the load and the AC adapter or the battery, resulting in no current path due to the parasitic diode. Thus, when the AC adapter and the battery are connected to the power supply switching circuit, the N-type MOS transistor is turned off, whereby the current path between the battery and the load is cut off completely and the N-type MOS transistor is turned on. Accordingly, the battery cannot supply a voltage to the load while only the AC adapter can supply a voltage to the load.

Power supply switching circuit

Provided is a switching regulator for preventing generation of an inrush current flowing through a switching element of an output stage, which is provided in the switching regulator. A soft start control circuit () detects a current flowing through a PMOS transistor () serving as a switching element of an output stage. When the detected current is equal to or larger than a current limiting value for limiting the current flowing through the PMOS transistor (), the soft start control circuit () controls the PMOS transistor () to be turned off. Accordingly, it is possible to prevent generation of the inrush current flowing through the PMOS transistor ().

Switching regulator

Provided is a switching regulator having an improved power supply voltage variation response characteristic while maintaining the stability of an output voltage to oscillation. An output resistance of an error amplifier is adjusted by a power supply voltage variation response improving circuit to allow a gain of the error amplifier to change.

Growing community of inventors

Chiba, Japan

Toshiyuki Tsuzaki